linux-kernel - Re: [PATCH 2/4] arm64: dts: imx8dxl: add lpuart device in cm40 subsystem

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Message-ID: <1889315.CQOukoFCf9@steina-w>
Date: Thu, 29 Feb 2024 11:12:39 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, linux-arm-kernel@...ts.infradead.org
Cc: devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Frank Li <Frank.Li@....com>, Alice Guo <alice.guo@....com>, Peng Fan <peng.fan@....com>, Frank Li <Frank.Li@....com>
Subject: Re: [PATCH 2/4] arm64: dts: imx8dxl: add lpuart device in cm40 subsystem

Hi Frank,

thanks for the patch.

Am Mittwoch, 28. Februar 2024, 20:54:58 CET schrieb Frank Li:
> From: Alice Guo <alice.guo@....com>
> 
> Adding lpuart device in cm40 subsystem.
> 
> Signed-off-by: Alice Guo <alice.guo@....com>
> Reviewed-by: Peng Fan <peng.fan@....com>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> index b1d626862ddf8..ecca5ada224b7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> @@ -64,4 +64,29 @@ cm40_intmux: intmux@...00000 {
>  		power-domains = <&pd IMX_SC_R_M4_0_INTMUX>;
>  		status = "disabled";
>  	};
> +
> +	cm40_lpuart: serial@...20000 {
> +		compatible = "fsl,imx8qxp-lpuart";
> +		reg = <0x37220000 0x1000>;
> +		interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-parent = <&cm40_intmux>;

With interrupt-parent set in Patch 1 for the whole subsystem, this line
is not needed anymore.

Best regards,
Alexander

> +		clocks = <&cm40_uart_lpcg 1>, <&cm40_uart_lpcg 0>;
> +		clock-names = "ipg", "baud";
> +		assigned-clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>;
> +		assigned-clock-rates = <24000000>;
> +		power-domains = <&pd IMX_SC_R_M4_0_UART>;
> +		status = "disabled";
> +	};
> +
> +	cm40_uart_lpcg: clock-controller@...20000 {
> +		compatible = "fsl,imx8qxp-lpcg";
> +		reg = <0x37620000 0x1000>;
> +		#clock-cells = <1>;
> +		clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>,
> +			 <&cm40_ipg_clk>;
> +		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>;
> +		clock-output-names = "cm40_lpcg_uart_clk",
> +				     "cm40_lpcg_uart_ipg_clk";
> +		power-domains = <&pd IMX_SC_R_M4_0_UART>;
> +	};
>  };
> 
> 


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