| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20240229-pio4-pinctrl-yaml-v1-3-c4d8279c083f@microchip.com>
Date: Thu, 29 Feb 2024 17:09:32 +0530
From: Balakrishnan Sambath <balakrishnan.s@...rochip.com>
To: Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Nicolas Ferre <nicolas.ferre@...rochip.com>, Alexandre Belloni
<alexandre.belloni@...tlin.com>, Claudiu Beznea <claudiu.beznea@...on.dev>,
Linus Walleij <linus.walleij@...aro.org>
CC: <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-gpio@...r.kernel.org>, "Balakrishnan
Sambath" <balakrishnan.s@...rochip.com>
Subject: [PATCH 3/3] dt-bindings: pinctrl: at91-pio4: convert Atmel's PIO4
bindings to json-schema
Convert the existing text DT bindings of Atmel's PIO4 pincontroller to
yaml based DT schema.
Signed-off-by: Balakrishnan Sambath <balakrishnan.s@...rochip.com>
---
.../bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 98 ---------------
.../bindings/pinctrl/atmel,sama5d2-pinctrl.yaml | 140 +++++++++++++++++++++
2 files changed, 140 insertions(+), 98 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
deleted file mode 100644
index 774c3c269c40..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
+++ /dev/null
@@ -1,98 +0,0 @@
-* Atmel PIO4 Controller
-
-The Atmel PIO4 controller is used to select the function of a pin and to
-configure it.
-
-Required properties:
-- compatible:
- "atmel,sama5d2-pinctrl"
- "microchip,sama7g5-pinctrl"
-- reg: base address and length of the PIO controller.
-- interrupts: interrupt outputs from the controller, one for each bank.
-- interrupt-controller: mark the device node as an interrupt controller.
-- #interrupt-cells: should be two.
-- gpio-controller: mark the device node as a gpio controller.
-- #gpio-cells: should be two.
-
-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
-a general description of GPIO and interrupt bindings.
-
-Please refer to pinctrl-bindings.txt in this directory for details of the
-common pinctrl bindings used by client devices.
-
-Subnode format
-Each node (or subnode) will list the pins it needs and how to configured these
-pins.
-
- node {
- pinmux = <PIN_NUMBER_PINMUX>;
- GENERIC_PINCONFIG;
- };
-
-Required properties:
-- pinmux: integer array. Each integer represents a pin number plus mux and
-ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
-right representation of the pin.
-
-Optional properties:
-- GENERIC_PINCONFIG: generic pinconfig options to use:
- - bias-disable, bias-pull-down, bias-pull-up, drive-open-drain,
- drive-push-pull input-schmitt-enable, input-debounce, output-low,
- output-high.
- - for microchip,sama7g5-pinctrl only:
- - slew-rate: 0 - disabled, 1 - enabled (default)
-- atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for
-high drive. The default value is low drive.
-
-Example:
-
-#include <sama5d2-pinfunc.h>
-
-...
-{
- pioA: pinctrl@...38000 {
- compatible = "atmel,sama5d2-pinctrl";
- reg = <0xfc038000 0x600>;
- interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
- <68 IRQ_TYPE_LEVEL_HIGH 7>,
- <69 IRQ_TYPE_LEVEL_HIGH 7>,
- <70 IRQ_TYPE_LEVEL_HIGH 7>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- clocks = <&pioA_clk>;
-
- pinctrl_i2c0_default: i2c0_default {
- pinmux = <PIN_PD21__TWD0>,
- <PIN_PD22__TWCK0>;
- bias-disable;
- };
-
- pinctrl_led_gpio_default: led_gpio_default {
- pinmux = <PIN_PB0>,
- <PIN_PB5>;
- bias-pull-up;
- atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
- };
-
- pinctrl_sdmmc1_default: sdmmc1_default {
- cmd_data {
- pinmux = <PIN_PA28__SDMMC1_CMD>,
- <PIN_PA18__SDMMC1_DAT0>,
- <PIN_PA19__SDMMC1_DAT1>,
- <PIN_PA20__SDMMC1_DAT2>,
- <PIN_PA21__SDMMC1_DAT3>;
- bias-pull-up;
- };
-
- ck_cd {
- pinmux = <PIN_PA22__SDMMC1_CK>,
- <PIN_PA30__SDMMC1_CD>;
- bias-disable;
- };
- };
- ...
- };
-};
-...
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,sama5d2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/atmel,sama5d2-pinctrl.yaml
new file mode 100644
index 000000000000..8a2dee1d6dd3
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,sama5d2-pinctrl.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/atmel,sama5d2-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIO4 Controller
+
+maintainers:
+ - Balakrishnan Sambath <balakrishnan.s@...rochip.com>
+
+description:
+ The Microchip PIO4 controller is used to select the function of a pin and to
+ configure it.
+
+
+properties:
+ compatible:
+ enum:
+ - microchip,sama7g5-pinctrl
+ - atmel,sama5d2-pinctrl
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ interrupts:
+ description:
+ Interrupt outputs from the controller, one for each bank.
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ clocks:
+ maxItems: 1
+if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,sama7g5-pinctrl
+then:
+ patternProperties:
+ '^.*([-_]default)?$':
+ anyOf:
+ - $ref: "#/$defs/mchp-pio4-pincfg-node-1"
+ - patternProperties:
+ '^[a-z_-][a-z_-]*$':
+ $ref: "#/$defs/mchp-pio4-pincfg-node-1"
+else:
+ patternProperties:
+ '^.*([-_]default)?$':
+ anyOf:
+ - $ref: "#/$defs/mchp-pio4-pincfg-node-2"
+ - patternProperties:
+ '^[a-z_-][a-z_-]*$':
+ $ref: "#/$defs/mchp-pio4-pincfg-node-2"
+
+$defs:
+ mchp-pio4-pincfg-node-1:
+ $ref: pincfg-node.yaml#properties
+ properties:
+ pinmux:
+ $ref: pinmux-node.yaml#/properties/pinmux
+ atmel,drive-strength:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3]
+ default: 0
+ required:
+ - pinmux
+
+ mchp-pio4-pincfg-node-2:
+ $ref: pincfg-node.yaml#properties
+ properties:
+ pinmux:
+ $ref: pinmux-node.yaml#/properties/pinmux
+ required:
+ - pinmux
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+ - gpio-controller
+ - '#gpio-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/clock/at91.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/pinctrl/sama5d2-pinfunc.h>
+
+ pinctrl@...38000 {
+ compatible = "atmel,sama5d2-pinctrl";
+ reg = <0xfc038000 0x600>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
+ <68 IRQ_TYPE_LEVEL_HIGH 7>,
+ <69 IRQ_TYPE_LEVEL_HIGH 7>,
+ <70 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ clocks = <&pioA_clk>;
+
+ pinctrl_i2c0_default: i2c0_default {
+ pinmux = <PIN_PD21__TWD0>,
+ <PIN_PD22__TWCK0>;
+ bias-disable;
+ };
+
+ pinctrl_sdmmc1_default: sdmmc1_default {
+ cmd_data {
+ pinmux = <PIN_PA28__SDMMC1_CMD>,
+ <PIN_PA18__SDMMC1_DAT0>,
+ <PIN_PA19__SDMMC1_DAT1>,
+ <PIN_PA20__SDMMC1_DAT2>,
+ <PIN_PA21__SDMMC1_DAT3>;
+ bias-pull-up;
+ };
+
+ ck_cd {
+ pinmux = <PIN_PA22__SDMMC1_CK>,
+ <PIN_PA30__SDMMC1_CD>;
+ bias-disable;
+ };
+ };
+ };
+...
--
2.25.1
Powered by blists - more mailing lists