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Message-ID: <CAP-5=fV49j-fMSF5PcAXP7hoD4guqy8DnQs_uJWcgVM7fKxLhQ@mail.gmail.com>
Date: Fri, 1 Mar 2024 08:39:52 -0800
From: Ian Rogers <irogers@...gle.com>
To: Sandipan Das <sandipan.das@....com>
Cc: linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
peterz@...radead.org, mingo@...hat.com, acme@...nel.org, namhyung@...nel.org,
mark.rutland@....com, alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
eranian@...gle.com, adrian.hunter@...el.com, ravi.bangoria@....com,
ananth.narayan@....com
Subject: Re: [PATCH] perf vendor events amd: Fix Zen 4 cache latency events
On Fri, Mar 1, 2024 at 12:44 AM Sandipan Das <sandipan.das@....com> wrote:
>
> L3PMCx0AC and L3PMCx0AD, used in l3_xi_sampled_latency* events, have a
> quirk that requires them to be programmed with SliceId set to 0x3.
> Without this, the events do not count at all and affects dependent
> metrics such as l3_read_miss_latency.
>
> If ThreadMask is not specified, the amd-uncore driver internally sets
> ThreadMask to 0x3, EnAllCores to 0x1 and EnAllSlices to 0x1 but does
> not set SliceId. Since SliceId must also be set to 0x3 in this case,
> specify all the other fields explicitly.
>
> E.g.
>
> $ sudo perf stat -e l3_xi_sampled_latency.all,l3_xi_sampled_latency_requests.all -a sleep 1
>
> Before:
>
> Performance counter stats for 'system wide':
>
> 0 l3_xi_sampled_latency.all
> 0 l3_xi_sampled_latency_requests.all
>
> 1.005155399 seconds time elapsed
>
> After:
>
> Performance counter stats for 'system wide':
>
> 921,446 l3_xi_sampled_latency.all
> 54,210 l3_xi_sampled_latency_requests.all
>
> 1.005664472 seconds time elapsed
>
> Fixes: 5b2ca349c313 ("perf vendor events amd: Add Zen 4 uncore events")
> Signed-off-by: Sandipan Das <sandipan.das@....com>
Reviewed-by: Ian Rogers <irogers@...gle.com>
Thanks,
Ian
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