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Date: Fri, 1 Mar 2024 21:32:16 +0000
From: "Keller, Jacob E" <jacob.e.keller@...el.com>
To: Chintan Vankar <c-vankar@...com>, Dan Carpenter
	<dan.carpenter@...aro.org>, Roger Quadros <rogerq@...nel.org>, "Siddharth
 Vadapalli" <s-vadapalli@...com>, Richard Cochran <richardcochran@...il.com>,
	Paolo Abeni <pabeni@...hat.com>, Jakub Kicinski <kuba@...nel.org>, "Eric
 Dumazet" <edumazet@...gle.com>, "David S. Miller" <davem@...emloft.net>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH net-next 2/2] net: ethernet: ti: am65-cpsw: Enable RX HW
 timestamp only for PTP packets



> -----Original Message-----
> From: Chintan Vankar <c-vankar@...com>
> Sent: Friday, March 1, 2024 2:49 AM
> To: Keller, Jacob E <jacob.e.keller@...el.com>; Dan Carpenter
> <dan.carpenter@...aro.org>; Roger Quadros <rogerq@...nel.org>; Siddharth
> Vadapalli <s-vadapalli@...com>; Richard Cochran <richardcochran@...il.com>;
> Paolo Abeni <pabeni@...hat.com>; Jakub Kicinski <kuba@...nel.org>; Eric
> Dumazet <edumazet@...gle.com>; David S. Miller <davem@...emloft.net>
> Cc: linux-kernel@...r.kernel.org; netdev@...r.kernel.org
> Subject: Re: [PATCH net-next 2/2] net: ethernet: ti: am65-cpsw: Enable RX HW
> timestamp only for PTP packets
> 
> 
> 
> On 17/02/24 03:51, Jacob Keller wrote:
> >
> >
> > On 2/15/2024 3:09 AM, Chintan Vankar wrote:
> >> The CPSW peripherals on J7AHP, J7VCL, J7AEP, J7ES, AM64 SoCs have
> >> an errata i2401 "CPSW: Host Timestamps Cause CPSW Port to Lock up".
> >>
> >
> > What's different about timestamping only PTP packets that prevents this
> > port lock up?
> 
> The difference is the way we are timestamping the packets. Instead of
> getting the timestamp from CPTS module, we are getting the timestamp
> from CPTS Event FIFO.
> 
> In the current mechanism of timestamping, am65-cpsw-nuss driver
> timestamps all received packets by setting the TSTAMP_EN bit in
> CPTS_CONTROL register, which directs the CPTS module to timestamp all
> received packets, followed by passing timestamp via DMA descriptors.
> This mechanism was responsible for the CPSW port to lock up in certain
> condition. We are preventing port lock up by disabling TSTAMP_EN bit in
> CPTS_CONTROL register.
> 
> The mechanism we are following in this patch, utilizes the CPTS Event
> FIFO that records timestamps corresponding to certain events, with one
> such event being the reception of an Ethernet packet with EtherType
> field set to PTP.

Ok that explains it. Thanks!

Regards,
Jake

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