linux-kernel - Re: [PATCH v4 02/15] RISC-V: Add FIRMWARE_READ

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Date: Fri, 1 Mar 2024 09:27:30 +0100
From: Clément Léger <cleger@...osinc.com>
To: Atish Patra <atishp@...osinc.com>, linux-kernel@...r.kernel.org
Cc: Mark Rutland <mark.rutland@....com>, linux-kselftest@...r.kernel.org,
 Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alexghiti@...osinc.com>,
 kvm@...r.kernel.org, Will Deacon <will@...nel.org>,
 Anup Patel <anup@...infault.org>, Paul Walmsley <paul.walmsley@...ive.com>,
 Conor Dooley <conor.dooley@...rochip.com>,
 Paolo Bonzini <pbonzini@...hat.com>, Guo Ren <guoren@...nel.org>,
 kvm-riscv@...ts.infradead.org, Atish Patra <atishp@...shpatra.org>,
 Palmer Dabbelt <palmer@...belt.com>, linux-riscv@...ts.infradead.org,
 Shuah Khan <shuah@...nel.org>, Andrew Jones <ajones@...tanamicro.com>
Subject: Re: [PATCH v4 02/15] RISC-V: Add FIRMWARE_READ_HI definition



On 29/02/2024 02:01, Atish Patra wrote:
> SBI v2.0 added another function to SBI PMU extension to read
> the upper bits of a counter with width larger than XLEN.
> 
> Add the definition for that function.
> 
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> Reviewed-by: Anup Patel <anup@...infault.org>
> Signed-off-by: Atish Patra <atishp@...osinc.com>
> ---
>  arch/riscv/include/asm/sbi.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 6e68f8dff76b..ef8311dafb91 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -131,6 +131,7 @@ enum sbi_ext_pmu_fid {
>  	SBI_EXT_PMU_COUNTER_START,
>  	SBI_EXT_PMU_COUNTER_STOP,
>  	SBI_EXT_PMU_COUNTER_FW_READ,
> +	SBI_EXT_PMU_COUNTER_FW_READ_HI,
>  };
>  
>  union sbi_pmu_ctr_info {

Reviewed-by: Clément Léger <cleger@...osinc.com>

Thanks,

Clément