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Message-ID: <ZeH6iHdOie0_UYwZ@hovoldconsulting.com>
Date: Fri, 1 Mar 2024 16:55:52 +0100
From: Johan Hovold <johan@...nel.org>
To: Krishna Kurapati <quic_kriskura@...cinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Wesley Cheng <quic_wcheng@...cinc.com>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
	Felipe Balbi <balbi@...nel.org>, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
	linux-kernel@...r.kernel.org, quic_ppratap@...cinc.com,
	quic_jackp@...cinc.com
Subject: Re: [PATCH v15 9/9] usb: dwc3: qcom: Add multiport suspend/resume
 support for wrapper

On Fri, Feb 16, 2024 at 06:27:56AM +0530, Krishna Kurapati wrote:
> Power event IRQ stat registers are present for each port
> connected to controller. Add support for modifying all power event
> irq stat registers present in wrapper.

Could you please say about what the power-event irqs are used for here
in the commit message as I asked you before?
 
> Signed-off-by: Krishna Kurapati <quic_kriskura@...cinc.com>
> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
> Acked-by: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
> ---
>  drivers/usb/dwc3/dwc3-qcom.c | 30 +++++++++++++++++++++++-------
>  1 file changed, 23 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index 572dc3fdae12..e789745a9468 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -37,7 +37,11 @@
>  #define PIPE3_PHYSTATUS_SW			BIT(3)
>  #define PIPE_UTMI_CLK_DIS			BIT(8)
>  
> -#define PWR_EVNT_IRQ_STAT_REG			0x58
> +#define PWR_EVNT_IRQ1_STAT_REG			0x58
> +#define PWR_EVNT_IRQ2_STAT_REG			0x1dc
> +#define PWR_EVNT_IRQ3_STAT_REG			0x228
> +#define PWR_EVNT_IRQ4_STAT_REG			0x238

Again, not sure it makes any defines too keep these defines when you
only access them through the array.

> +
>  #define PWR_EVNT_LPM_IN_L2_MASK			BIT(4)
>  #define PWR_EVNT_LPM_OUT_L2_MASK		BIT(5)
>  
> @@ -109,6 +113,13 @@ struct dwc3_qcom {
>  	u8			num_ports;
>  };
>  
> +static const u32 pwr_evnt_irq_stat_reg_offset[DWC3_MAX_PORTS] = {

Seems "_offset" is redundant here, 'pwr_evnt_irq_stat_reg' should be
enough.

> +	PWR_EVNT_IRQ1_STAT_REG,
> +	PWR_EVNT_IRQ2_STAT_REG,
> +	PWR_EVNT_IRQ3_STAT_REG,
> +	PWR_EVNT_IRQ4_STAT_REG,
> +};
> +
>  static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val)
>  {
>  	u32 reg;
> @@ -444,9 +455,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
>  	if (qcom->is_suspended)
>  		return 0;
>  
> -	val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG);
> -	if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
> -		dev_err(qcom->dev, "HS-PHY not in L2\n");
> +	for (i = 0; i < qcom->num_ports; i++) {
> +		val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg_offset[i]);
> +		if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
> +			dev_err(qcom->dev, "Port-%d HS-PHY not in L2\n", i + 1);

Please use lower case "port-%d" for consistency.

Johan

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