linux-kernel - Re: [PATCH v2 1/2] arm64: dts: qcom: sc8280xp: Add multiport controller node for SC8280

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Message-ID: <ZeIAm74PplfLVis3@hovoldconsulting.com>
Date: Fri, 1 Mar 2024 17:21:47 +0100
From: Johan Hovold <johan@...nel.org>
To: Krishna Kurapati <quic_kriskura@...cinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	quic_ppratap@...cinc.com, quic_jackp@...cinc.com
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: sc8280xp: Add multiport
 controller node for SC8280

On Tue, Feb 13, 2024 at 01:57:23PM +0530, Krishna Kurapati wrote:
> Add USB and DWC3 node for tertiary port of SC8280 along with multiport
> IRQ's and phy's. This will be used as a base for SA8295P and SA8295-Ride

"interrupts" and "PHYs"

> platforms.

But I suggest you just reword this along the lines of

	Add USB DWC3 multiport controller.

as it's assumed that you'll describe resources like interrupts and PHYs.

Perhaps no need to mention SA8295p either as this change is needed (and
correct) also for sc8280xp proper.

> Signed-off-by: Krishna Kurapati <quic_kriskura@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 82 ++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index febf28356ff8..29dbf2a9cdba 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3331,6 +3331,88 @@ system-cache-controller@...0000 {
>  			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> +		usb_2: usb@...8800 {

> +			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>,

> +					      <&pdc 127 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 126 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 129 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 128 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 131 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 130 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 133 IRQ_TYPE_EDGE_RISING>,
> +					      <&pdc 132 IRQ_TYPE_EDGE_RISING>,

These should all be IRQ_TYPE_EDGE_BOTH as DP/DM interrupts may need to
trigger also on falling edges.

> +					      <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			interrupt-names = "pwr_event_1", "pwr_event_2",
> +					  "pwr_event_3", "pwr_event_4",
> +					  "hs_phy_1",	 "hs_phy_2",
> +					  "hs_phy_3",	 "hs_phy_4",
> +					  "dp_hs_phy_1", "dm_hs_phy_1",
> +					  "dp_hs_phy_2", "dm_hs_phy_2",
> +					  "dp_hs_phy_3", "dm_hs_phy_3",
> +					  "dp_hs_phy_4", "dm_hs_phy_4",
> +					  "ss_phy_1",	 "ss_phy_2";

Johan