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Message-ID: <172e03d1f7bdb65c15e6a6ca5f52b3dd1929c7cc.camel@mediatek.com>
Date: Tue, 5 Mar 2024 03:26:32 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
Singo Chang (張興國) <Singo.Chang@...iatek.com>,
Jason-ch Chen (陳建豪)
<Jason-ch.Chen@...iatek.com>, Shawn Sung (宋孝謙)
<Shawn.Sung@...iatek.com>, Nancy Lin (林欣螢)
<Nancy.Lin@...iatek.com>, Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>
Subject: Re: [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add
cmdq_pkt_poll_addr() function
Hi, Jason:
On Mon, 2024-03-04 at 16:04 +0000, Jason-JH Lin (林睿祥) wrote:
> Hi CK,
>
> Thanks for the reviews.
>
> On Mon, 2024-03-04 at 03:11 +0000, CK Hu (胡俊光) wrote:
> > Hi, Jason:
> >
> > On Fri, 2024-03-01 at 22:44 +0800, Jason-JH.Lin wrote:
> > > Add cmdq_pkt_poll_addr function to support CMDQ user making
> > > an instruction for polling a specific address of hardware rigster
> > > to check the value with or without mask.
> > >
> > > POLL is an old operation in GCE, so it does not support SPR and
> > > CMDQ_CODE_LOGIC. CMDQ users need to use GPR and CMDQ_CODE_MASK
> > > to move polling register address to GPR to make an instruction.
> > > This will be done in cmdq_pkt_poll_addr().
> > >
> > > Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> > > ---
> > > drivers/soc/mediatek/mtk-cmdq-helper.c | 38
> > > ++++++++++++++++++++++++++
> > > include/linux/soc/mediatek/mtk-cmdq.h | 16 +++++++++++
> > > 2 files changed, 54 insertions(+)
> > >
> > > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > > b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > > index 3a1e47ad8a41..2e9fc9bb1183 100644
> > > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > > @@ -12,6 +12,7 @@
> > >
> > > #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> > > #define CMDQ_POLL_ENABLE_MASK BIT(0)
> > > +#define CMDQ_POLL_HIGH_ADDR_GPR (14)
> >
> > I think there are multiple GPR and you use #14 to store high addr.
> > I
> > would like you to list all GPR and do not limit the usage of each
> > GPR.
> > The question is, why limit #14 to be high addr? If the GPR is
> > shared
> > by
> > all threads, there should be a mechanism to manage GPR usage for
> > client
> > driver to allocate/free GPR.
>
> Yes, there are 16 GPR, from GPR_R0 ~ GPR_R15 and they are shared by
> all
> threads, but GPR_R0 and GPR_R1 is used by GCE HW itself.
>
> I think user may not know which GPR is available, so I think CMDQ
> driver should manage the usage of GPR instead of configure by the
> user.
>
> Currently, we only use 1 dedicated GPR in poll, so I defined it in
> CMDQ
> driver to make it simpler.
If thread 1 poll addr A first, GPR is set to A. But poll time exceed
GCE_THD_SLOT_CYCLES, change to thread 2 and thread 2 poll addr B, GPR
is set to B. Later switch to thread A and GCE would execute poll
command and GPR is B, so thread 1 would poll addr B, but this is wrong.
How do you solve this problem?
Regards,
CK
>
> >
> > > #define CMDQ_EOC_IRQ_EN BIT(0)
> > > #define CMDQ_REG_TYPE 1
> > > #define CMDQ_JUMP_RELATIVE 1
> > > @@ -406,6 +407,43 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt,
> > > u8
> > > subsys,
> > > }
> > > EXPORT_SYMBOL(cmdq_pkt_poll_mask);
> > >
> > > +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr,
> > > u32
> > > value, u32 mask)
> > > +{
> > > + struct cmdq_instruction inst = { {0} };
> > > + int err;
> > > + u8 use_mask = 0;
> > > +
> > > + if (mask != U32_MAX) {
> > > + inst.op = CMDQ_CODE_MASK;
> > > + inst.mask = ~mask;
> > > + err = cmdq_pkt_append_command(pkt, inst);
> > > + if (err != 0)
> > > + return err;
> > > + use_mask = CMDQ_POLL_ENABLE_MASK;
> > > + }
> > > +
> > > + /*
> > > + * POLL is an old operation in GCE and it does not support SPR
> > > and CMDQ_CODE_LOGIC,
> > > + * so it can not use cmdq_pkt_assign to keep polling register
> > > address to SPR.
> > > + * It needs to use GPR and CMDQ_CODE_MASK to move polling
> > > register address to GPR.
> > > + */
> > > + inst.op = CMDQ_CODE_MASK;
> > > + inst.dst_t = CMDQ_REG_TYPE;
> > > + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR;
> > > + inst.mask = addr;
> >
> > This is full address, not high address. Why name the GPR to
> > CMDQ_POLL_HIGH_ADDR_GPR?
> >
>
> My mistake, I'll remove that 'HIGH' word.
>
> > The addr is not mask, so I would like inst.value = addr.
>
> OK, I'll change it.
>
> Regards,
> Jason-JH.Lin
>
> >
> > Regards,
> > CK
> >
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