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Message-ID: <CA+V-a8uq=gw0_EVT3_CZD0TO+-DnSqXJtFakFcNWHOfq58g4aA@mail.gmail.com>
Date: Wed, 6 Mar 2024 10:21:58 +0000
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby <jirislaby@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org, devicetree@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH] dt-bindings: serial: renesas,scif: Document R9A09G057 support
Hi Geert,
On Wed, Mar 6, 2024 at 10:15 AM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, Mar 6, 2024 at 11:06 AM Lad, Prabhakar
> <prabhakar.csengg@...il.com> wrote:
> > On Wed, Mar 6, 2024 at 9:53 AM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> > > On Tue, Mar 5, 2024 at 6:16 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > > >
> > > > Document support for the Serial Communication Interface with FIFO (SCIF)
> > > > available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
> > > > the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
> > > > (R9A07G044) SoC, with the only difference being that the RZ/V2H(P) SoC has
> > > > three additional interrupts: one for Tx end/Rx ready and the other two for
> > > > Rx and Tx buffer full, which are edge-triggered.
> > > >
> > > > No driver changes are required as generic compatible string
> > > > "renesas,scif-r9a07g044" will be used as a fallback on RZ/V2H(P) SoC.
> > >
> > > If you declare SCIF on RZ/V2H compatible with SCIF on RZ/G2L, you
> > > state that the current driver works fine (but perhaps suboptimal),
> > > without adding support for the extra 3 interrupts?
> > >
> > Yes the current driver works without using the extra interrupts on the
> > RZ/V2H. The extra interrupts on the RZ/V2H are just sort of duplicate
> > ie
> > - Transmit End/Data Ready interrupt , for which we we have two
> > seperate interrupts already
> > - Receive buffer full interrupt (EDGE trigger), for which we already
> > have a Level triggered interrupt
> > - Transmit buffer empty interrupt (EDGE trigger), for which we already
> > have a Level triggered interrupt
>
> Thanks for the confirmation!
>
> > Are you suggesting to not fallback on RZ/G2L and instead make RZ/V2H
> > an explicit one so that in future we handle these 3 extra interrupts?
>
> In light of the confirmation above, I am _not_ suggesting that.
>
Thanks for clarification.
> I just wanted a clarification: if the current driver would not operate
> properly without changes, the fallback would not have been appropriate.
> W.r.t. the extra interrupts, you can add support to the driver later,
> if/when a need or desire ever arises.
>
Agreed, thanks.
Cheers,
Prabhakar
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