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Date: Thu, 7 Mar 2024 17:41:53 +0100
From: Cezary Rojewski <cezary.rojewski@...el.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	<alsa-devel@...a-project.org>, <linux-sound@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
CC: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>, Liam Girdwood
	<liam.r.girdwood@...ux.intel.com>, Peter Ujfalusi
	<peter.ujfalusi@...ux.intel.com>, Bard Liao
	<yung-chuan.liao@...ux.intel.com>, Ranjani Sridharan
	<ranjani.sridharan@...ux.intel.com>, Kai Vehmanen
	<kai.vehmanen@...ux.intel.com>, Mark Brown <broonie@...nel.org>, "Jaroslav
 Kysela" <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>
Subject: Re: [PATCH v1 1/1] ASoC: Intel: catpt: Carefully use PCI bitwise
 constants

On 2024-03-07 5:37 PM, Andy Shevchenko wrote:
> PM constants for PCI devices are defined with bitwise annotation.
> When used as is, sparse complains about that:
> 
>    .../catpt/dsp.c:390:9: warning: restricted pci_power_t degrades to integer
>    .../catpt/dsp.c:414:9: warning: restricted pci_power_t degrades to integer
> 
> Force them to be u32 in the driver.

Thank you for this input, Andy.

Acked-by: Cezary Rojewski <cezary.rojewski@...el.com>

> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
>   sound/soc/intel/catpt/dsp.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/sound/soc/intel/catpt/dsp.c b/sound/soc/intel/catpt/dsp.c
> index 346bec000306..5454c6d9ab5b 100644
> --- a/sound/soc/intel/catpt/dsp.c
> +++ b/sound/soc/intel/catpt/dsp.c
> @@ -387,7 +387,7 @@ int catpt_dsp_power_down(struct catpt_dev *cdev)
>   	mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit;
>   	catpt_updatel_pci(cdev, VDRTCTL0, mask, cdev->spec->d3pgd_bit);
>   
> -	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D3hot);
> +	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot);
>   	/* give hw time to drop off */
>   	udelay(50);
>   
> @@ -411,7 +411,7 @@ int catpt_dsp_power_up(struct catpt_dev *cdev)
>   	val = mask & (~CATPT_VDRTCTL2_DTCGE);
>   	catpt_updatel_pci(cdev, VDRTCTL2, mask, val);
>   
> -	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D0);
> +	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0);
>   
>   	/* SRAM power gating none */
>   	mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit;

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