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Date: Thu, 07 Mar 2024 21:25:55 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Johan Hovold <johan+linaro@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH 2/4] arm64: dts: qcom: sc8280xp: Add QFPROM node
Describe the QFPROM NVMEM block. Also, add a subnode to represent the
GPU speed bin region within it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index a5b194813079..a3725d917bef 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -862,6 +862,18 @@ ipcc: mailbox@...000 {
#mbox-cells = <2>;
};
+ qfprom: efuse@...000 {
+ compatible = "qcom,sc8280xp-qfprom", "qcom,qfprom";
+ reg = <0 0x00784000 0 0x3000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gpu_speed_bin: gpu-speed-bin@18b {
+ reg = <0x18b 0x1>;
+ bits = <5 3>;
+ };
+ };
+
qup2: geniqup@...000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x2000>;
--
2.40.1
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