lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
 <DU2PR04MB882259EC13676F32F24EB58B8C272@DU2PR04MB8822.eurprd04.prod.outlook.com>
Date: Fri, 8 Mar 2024 03:36:05 +0000
From: Xu Yang <xu.yang_2@....com>
To: Frank Li <frank.li@....com>
CC: "will@...nel.org" <will@...nel.org>, "mark.rutland@....com"
	<mark.rutland@....com>, "robh+dt@...nel.org" <robh+dt@...nel.org>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "shawnguo@...nel.org"
	<shawnguo@...nel.org>, "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>, "festevam@...il.com"
	<festevam@...il.com>, "john.g.garry@...cle.com" <john.g.garry@...cle.com>,
	"jolsa@...nel.org" <jolsa@...nel.org>, "namhyung@...nel.org"
	<namhyung@...nel.org>, "irogers@...gle.com" <irogers@...gle.com>,
	"mike.leach@...aro.org" <mike.leach@...aro.org>, "peterz@...radead.org"
	<peterz@...radead.org>, "mingo@...hat.com" <mingo@...hat.com>,
	"acme@...nel.org" <acme@...nel.org>, "alexander.shishkin@...ux.intel.com"
	<alexander.shishkin@...ux.intel.com>, "adrian.hunter@...el.com"
	<adrian.hunter@...el.com>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-perf-users@...r.kernel.org"
	<linux-perf-users@...r.kernel.org>, "imx@...ts.linux.dev"
	<imx@...ts.linux.dev>
Subject: RE: [PATCH v6 2/7] perf: imx_perf: add macro definitions for parsing
 config attr

> 
> On Thu, Mar 07, 2024 at 05:57:25PM +0800, Xu Yang wrote:
> > The user can set event and counter in cmdline and the driver need to parse
> > it using 'config' attr value. This will add macro definitions to avoid
> > hard-code in driver.
> >
> > Signed-off-by: Xu Yang <xu.yang_2@....com>
> >
> > ---
> > Changes in v4:
> >  - new patch
> > Changes in v5:
> >  - move this patch earlier
> > Changes in v6:
> >  - no changes
> > ---
> >  drivers/perf/fsl_imx9_ddr_perf.c | 15 +++++++++++----
> >  1 file changed, 11 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
> > index 9685645bfe04..d1c566e661d8 100644
> > --- a/drivers/perf/fsl_imx9_ddr_perf.c
> > +++ b/drivers/perf/fsl_imx9_ddr_perf.c
> > @@ -42,6 +42,11 @@
> >  #define NUM_COUNTERS		11
> >  #define CYCLES_COUNTER		0
> >
> > +#define CONFIG_EVENT_MASK	0x00FF
> > +#define CONFIG_EVENT_OFFSET	0
> 
> Needn't need OFFSET if use FIELD_*

Okay, I will use FIELD_*.

> 
> > +#define CONFIG_COUNTER_MASK	0xFF00
> > +#define CONFIG_COUNTER_OFFSET	8
> 
> The same
> 
> > +
> >  #define to_ddr_pmu(p)		container_of(p, struct ddr_pmu, pmu)
> >
> >  #define DDR_PERF_DEV_NAME	"imx9_ddr"
> > @@ -339,8 +344,10 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config,
> >  				    int counter, bool enable)
> >  {
> >  	u32 ctrl_a;
> > +	int event;
> >
> >  	ctrl_a = readl_relaxed(pmu->base + PMLCA(counter));
> > +	event = (config & CONFIG_EVENT_MASK) >> CONFIG_EVENT_OFFSET;
> 
> FIELD_GET(CONFIG_EVENT_MASK, config);
> 
> same below all code about config.

Okay.

Thanks,
Xu Yang

> 
> >
> >  	if (enable) {
> >  		ctrl_a |= PMLCA_FC;
> > @@ -352,7 +359,7 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config,
> >  		ctrl_a &= ~PMLCA_FC;
> >  		ctrl_a |= PMLCA_CE;
> >  		ctrl_a &= ~FIELD_PREP(PMLCA_EVENT, 0x7F);
> > -		ctrl_a |= FIELD_PREP(PMLCA_EVENT, (config & 0x000000FF));
> > +		ctrl_a |= FIELD_PREP(PMLCA_EVENT, event);
> >  		writel(ctrl_a, pmu->base + PMLCA(counter));
> >  	} else {
> >  		/* Freeze counter. */
> > @@ -366,8 +373,8 @@ static void ddr_perf_monitor_config(struct ddr_pmu *pmu, int cfg, int cfg1, int
> >  	u32 pmcfg1, pmcfg2;
> >  	int event, counter;
> >
> > -	event = cfg & 0x000000FF;
> > -	counter = (cfg & 0x0000FF00) >> 8;
> > +	event = (cfg & CONFIG_EVENT_MASK) >> CONFIG_EVENT_OFFSET;
> > +	counter = (cfg & CONFIG_COUNTER_MASK) >> CONFIG_COUNTER_OFFSET;
> >
> >  	pmcfg1 = readl_relaxed(pmu->base + PMCFG1);
> >
> > @@ -469,7 +476,7 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
> >  	int cfg2 = event->attr.config2;
> >  	int counter;
> >
> > -	counter = (cfg & 0x0000FF00) >> 8;
> > +	counter = (cfg & CONFIG_COUNTER_MASK) >> CONFIG_COUNTER_OFFSET;
> >
> >  	pmu->events[counter] = event;
> >  	pmu->active_events++;
> > --
> > 2.34.1
> >

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ