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Message-ID: <ff708cd5-efe1-47e0-8112-ac7a2658cd8d@collabora.com>
Date: Fri, 8 Mar 2024 09:41:35 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Justin Swartz <justin.swartz@...ingedge.co.za>,
Arınç ÜNAL <arinc.unal@...nc9.com>,
Sergio Paracuellos <sergio.paracuellos@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] mips: dts: ralink: mt7621: associate uart1_pins
with serial0
Il 07/03/24 20:04, Justin Swartz ha scritto:
> Add missing pinctrl-name and pinctrl-0 properties to declare
> that the uart1_pins group is associated with serial0.
>
> Signed-off-by: Justin Swartz <justin.swartz@...ingedge.co.za>
> ---
> arch/mips/boot/dts/ralink/mt7621.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 35a10258f..dca415fdd 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -123,6 +123,9 @@ serial0: serial@c00 {
> reg-shift = <2>;
> reg-io-width = <4>;
> no-loopback-test;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
> };
>
> spi0: spi@b00 {
The pins are muxed and can be either UART, or some other function that
is supported by the mux: this means that the pinctrl-xxx properties shall
*not* go into the SoC dtsi file, but in board dts files instead.
Said differently: the usage of the UART pins is board-specific, not SoC-wide.
Regards,
Angelo
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