lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1e35a288-0a11-4df6-b7c5-82e5cb6e1d3c@amd.com>
Date: Fri, 8 Mar 2024 14:48:04 +0100
From: Michal Simek <michal.simek@....com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: linux-spi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH v1 3/3] spi: xilinx: Make num_chipselect 8-bit in the
 struct xspi_platform_data



On 3/8/24 14:31, Andy Shevchenko wrote:
> On Fri, Mar 08, 2024 at 09:20:23AM +0100, Michal Simek wrote:
>> On 3/7/24 16:43, Andy Shevchenko wrote:
> 
> ...
> 
>>>    struct xspi_platform_data {
>>> -	u16 num_chipselect;
>>> -	u8 bits_per_word;
>>> -	struct spi_board_info *devices;
>>> -	u8 num_devices;
>>>    	bool force_irq;
>>> +	u8 num_chipselect;
>>> +	u8 bits_per_word;
>>> +	u8 num_devices;
>>
>> all above have 32bits. It means on 64bit cpu you have 32bit gap here.
> 
>>> +	struct spi_board_info *devices;
> 
> On all architectures? I mean do all 64-bit architecture ABIs _require_
> the pointer to be aligned at 8-byte boundary? Even if so, the struct
> itself can be aligned on 4-byte boundary.

I am not able to tell if toolchain enforce 8byte alignment by default/by setup 
on all 64bit systems.
I am using pahole to check this which was recommended by Greg in past which 
reports gap in the middle.

thanks,
Michal




Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ