linux-kernel - Re: [RFCv2 PATCH 3/7] iommu/amd: Update PASID, GATS, and GLX feature related macros

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240308135502.GK9179@nvidia.com>
Date: Fri, 8 Mar 2024 09:55:02 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Cc: linux-kernel@...r.kernel.org, iommu@...ts.linux.dev, joro@...tes.org,
	yi.l.liu@...el.com, kevin.tian@...el.com, nicolinc@...dia.com,
	eric.auger@...hat.com, vasant.hegde@....com, jon.grimm@....com,
	santosh.shukla@....com, Dhaval.Giani@....com, pandoh@...gle.com,
	loganodell@...gle.com
Subject: Re: [RFCv2 PATCH 3/7] iommu/amd: Update PASID, GATS, and GLX feature
 related macros

On Thu, Jan 11, 2024 at 06:06:42PM -0600, Suravee Suthikulpanit wrote:
> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> index ff56c857f6ad..f8baa8d88832 100644
> --- a/drivers/iommu/amd/amd_iommu_types.h
> +++ b/drivers/iommu/amd/amd_iommu_types.h
> @@ -93,8 +93,6 @@
>  #define FEATURE_GA		BIT_ULL(7)
>  #define FEATURE_HE		BIT_ULL(8)
>  #define FEATURE_PC		BIT_ULL(9)
> -#define FEATURE_GATS_SHIFT	(12)
> -#define FEATURE_GATS_MASK	(3ULL)
>  #define FEATURE_GAM_VAPIC	BIT_ULL(21)
>  #define FEATURE_GIOSUP		BIT_ULL(48)
>  #define FEATURE_HASUP		BIT_ULL(49)
> @@ -102,11 +100,14 @@
>  #define FEATURE_HDSUP		BIT_ULL(52)
>  #define FEATURE_SNP		BIT_ULL(63)
>  
> -#define FEATURE_PASID_SHIFT	32
> -#define FEATURE_PASID_MASK	(0x1fULL << FEATURE_PASID_SHIFT)
> +#define FEATURE_GATS_SHIFT	12
> +#define FEATURE_GATS_MASK	(0x03ULL << FEATURE_GATS_SHIFT)
>  
> -#define FEATURE_GLXVAL_SHIFT	14
> -#define FEATURE_GLXVAL_MASK	(0x03ULL << FEATURE_GLXVAL_SHIFT)
> +#define FEATURE_GLX_SHIFT	14
> +#define FEATURE_GLX_MASK	(0x03ULL << FEATURE_GLX_SHIFT)
> +
> +#define FEATURE_PASMAX_SHIFT	32
> +#define FEATURE_PASMAX_MASK	(0x1FULL << FEATURE_PASMAX_SHIFT)

If you are touching these please convert them all over to GENMASK.
ie:

#define FEATURE_PASMAX GENMASK_ULL(36, 32)

pasmax = FIELD_GET(FEATURE_PASMAX, amd_iommu_efr)

Jason