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Message-ID: <adc58b09d99d62df2c7559657547ca29@manjaro.org>
Date: Fri, 08 Mar 2024 16:30:10 +0100
From: Dragan Simic <dsimic@...jaro.org>
To: Quentin Schulz <foss+kernel@...il.net>
Cc: Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
 Heiko Stuebner <heiko@...ech.de>, Klaus Goger
 <klaus.goger@...obroma-systems.com>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Quentin Schulz
 <quentin.schulz@...obroma-systems.com>
Subject: Re: [PATCH 3/3] arm64: dts: rockchip: add regulators for PCIe on
 RK3399 Puma Haikou

On 2024-03-08 13:52, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@...obroma-systems.com>
> 
> The PCIe PHY requires two regulators and are present on the SoM
> directly, while the PCIe connector also exposes 3V3 and 12V power rails
> which are available on the baseboard.
> 
> Considering that 3/4 regulators are always-on on HW level and that the
> last one depends on a regulator from the PMIC that is specified as
> always on, this commit should be purely cosmetic and no change in
> behavior is expected.
> 
> Let's add all regulators for PCIe on RK3399 Puma Haikou.
> 
> Signed-off-by: Quentin Schulz <quentin.schulz@...obroma-systems.com>

Looking good to me, assuming that the regulator naming follows the
labels used in the schematics.

Reviewed-by: Dragan Simic <dsimic@...jaro.org>

> ---
>  .../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts |  2 ++
>  arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi      | 26 
> ++++++++++++++++++++++
>  2 files changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
> b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
> index 18a98c4648eae..66ebb148bbc9a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
> @@ -194,6 +194,8 @@ &pcie0 {
>  	num-lanes = <4>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie_clkreqn_cpm>;
> +	vpcie3v3-supply = <&vcc3v3_baseboard>;
> +	vpcie12v-supply = <&dc_12v>;
>  	status = "okay";
>  };
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
> index 2484ad2bd86fc..1113f57b09313 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
> @@ -79,6 +79,26 @@ vcc5v0_sys: vcc5v0-sys {
>  		regulator-max-microvolt = <5000000>;
>  	};
> 
> +	vcca0v9: vcca0v9-regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcca0v9";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <900000>;
> +		regulator-max-microvolt = <900000>;
> +		vin-supply = <&vcc_1v8>;
> +	};
> +
> +	vcca1v8: vcca1v8-regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcca1v8";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc3v3_sys>;
> +	};
> +
>  	vdd_log: vdd-log {
>  		compatible = "pwm-regulator";
>  		pwms = <&pwm2 0 25000 1>;
> @@ -416,6 +436,12 @@ &io_domains {
>  	gpio1830-supply = <&vcc_1v8>;
>  };
> 
> +&pcie0 {
> +	/* PCIe PHY supplies */
> +	vpcie0v9-supply = <&vcca0v9>;
> +	vpcie1v8-supply = <&vcca1v8>;
> +};
> +
>  &pcie_clkreqn_cpm {
>  	rockchip,pins =
>  		<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;

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