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Message-Id: <20240311063018.1886757-1-dqfext@gmail.com>
Date: Mon, 11 Mar 2024 14:30:18 +0800
From: Qingfang Deng <dqfext@...il.com>
To: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atishp@...shpatra.org>,
Anup Patel <anup@...infault.org>,
Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Andrew Jones <ajones@...tanamicro.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Heiko Stuebner <heiko@...ech.de>,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH] perf: RISC-V: fix IRQ detection on T-Head C908
T-Head C908 has the same IRQ num and CSR as previous C9xx cores, but
reports non-zero marchid and mimpid. Remove the ID checks.
Fixes: 65e9fb081877 ("drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores")
Signed-off-by: Qingfang Deng <dqfext@...il.com>
---
arch/riscv/errata/thead/errata.c | 4 ----
drivers/perf/riscv_pmu_sbi.c | 4 +---
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index b1c410bbc1ae..49ccad5b21bb 100644
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -125,10 +125,6 @@ static bool errata_probe_pmu(unsigned int stage,
if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PMU))
return false;
- /* target-c9xx cores report arch_id and impid as 0 */
- if (arch_id != 0 || impid != 0)
- return false;
-
if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
return false;
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 452aab49db1e..87b83184383a 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -811,9 +811,7 @@ static int pmu_sbi_setup_irqs(struct riscv_pmu *pmu, struct platform_device *pde
riscv_pmu_irq_num = RV_IRQ_PMU;
riscv_pmu_use_irq = true;
} else if (IS_ENABLED(CONFIG_ERRATA_THEAD_PMU) &&
- riscv_cached_mvendorid(0) == THEAD_VENDOR_ID &&
- riscv_cached_marchid(0) == 0 &&
- riscv_cached_mimpid(0) == 0) {
+ riscv_cached_mvendorid(0) == THEAD_VENDOR_ID) {
riscv_pmu_irq_num = THEAD_C9XX_RV_IRQ_PMU;
riscv_pmu_use_irq = true;
}
--
2.34.1
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