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Date: Mon, 11 Mar 2024 16:34:35 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Andy Lutomirski <luto@...nel.org>,
 Pasha Tatashin <pasha.tatashin@...een.com>,
 Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
 linux-mm@...ck.org, Andrew Morton <akpm@...ux-foundation.org>,
 the arch/x86 maintainers <x86@...nel.org>, Borislav Petkov <bp@...en8.de>,
 Christian Brauner <brauner@...nel.org>, bristot@...hat.com,
 Ben Segall <bsegall@...gle.com>, Dave Hansen <dave.hansen@...ux.intel.com>,
 dianders@...omium.org, dietmar.eggemann@....com, eric.devolder@...cle.com,
 hca@...ux.ibm.com, "hch@...radead.org" <hch@...radead.org>,
 "H. Peter Anvin" <hpa@...or.com>, Jacob Pan <jacob.jun.pan@...ux.intel.com>,
 Jason Gunthorpe <jgg@...pe.ca>, jpoimboe@...nel.org,
 Joerg Roedel <jroedel@...e.de>, juri.lelli@...hat.com,
 Kent Overstreet <kent.overstreet@...ux.dev>, kinseyho@...gle.com,
 "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>, lstoakes@...il.com,
 mgorman@...e.de, mic@...ikod.net, michael.christie@...cle.com,
 Ingo Molnar <mingo@...hat.com>, mjguzik@...il.com,
 "Michael S. Tsirkin" <mst@...hat.com>, Nicholas Piggin <npiggin@...il.com>,
 "Peter Zijlstra (Intel)" <peterz@...radead.org>,
 Petr Mladek <pmladek@...e.com>, Rick P Edgecombe
 <rick.p.edgecombe@...el.com>, Steven Rostedt <rostedt@...dmis.org>,
 Suren Baghdasaryan <surenb@...gle.com>, Thomas Gleixner
 <tglx@...utronix.de>, Uladzislau Rezki <urezki@...il.com>,
 vincent.guittot@...aro.org, vschneid@...hat.com
Subject: Re: [RFC 11/14] x86: add support for Dynamic Kernel Stacks

On 3/11/24 15:17, Andy Lutomirski wrote:
> I *think* that all x86 implementations won't fill the TLB for a
> non-accessed page without also setting the accessed bit,

That's my understanding as well.  The SDM is a little more obtuse about it:

> Whenever the processor uses a paging-structure entry as part of
> linear-address translation, it sets the accessed flag in that entry
> (if it is not already set).

but it's there.

But if we start needing Accessed=1 to be accurate, clearing those PTEs
gets more expensive because it needs to be atomic to lock out the page
walker.  It basically needs to start getting treated similarly to what
is done for Dirty=1 on userspace PTEs.  Not the end of the world, of
course, but one more source of overhead.


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