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Message-ID: <1c24d9d8-36dd-4bf1-a1b0-afd371fbb809@sifive.com>
Date: Tue, 12 Mar 2024 18:56:47 -0500
From: Samuel Holland <samuel.holland@...ive.com>
To: Charlie Jenkins <charlie@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, Atish Patra <atishp@...osinc.com>,
Alexandre Ghiti <alexghiti@...osinc.com>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Jonathan Corbet <corbet@....net>, Conor Dooley <conor.dooley@...rochip.com>,
Clément Léger <cleger@...osinc.com>,
Atish Patra <atishp@...shpatra.org>, Randy Dunlap <rdunlap@...radead.org>,
Alexandre Ghiti <alex@...ti.fr>
Subject: Re: [PATCH v13 2/4] riscv: Include riscv_set_icache_flush_ctx prctl
On 2024-03-12 6:53 PM, Charlie Jenkins wrote:
> Support new prctl with key PR_RISCV_SET_ICACHE_FLUSH_CTX to enable
> optimization of cross modifying code. This prctl enables userspace code
> to use icache flushing instructions such as fence.i with the guarantee
> that the icache will continue to be clean after thread migration.
>
> Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> Reviewed-by: Atish Patra <atishp@...osinc.com>
> Reviewed-by: Alexandre Ghiti <alexghiti@...osinc.com>
> ---
> arch/riscv/include/asm/mmu.h | 2 +
> arch/riscv/include/asm/processor.h | 10 ++++
> arch/riscv/include/asm/switch_to.h | 23 ++++++++
> arch/riscv/mm/cacheflush.c | 111 +++++++++++++++++++++++++++++++++++++
> arch/riscv/mm/context.c | 19 ++++---
> include/uapi/linux/prctl.h | 6 ++
> kernel/sys.c | 6 ++
> 7 files changed, 169 insertions(+), 8 deletions(-)
Thanks for the updates!
Reviewed-by: Samuel Holland <samuel.holland@...ive.com>
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