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Message-ID: <v32llcm32lrgxx7inpndjyl4bj2jq3m4sncb7h23hii5k4krlo@gavzbjsuq3sr>
Date: Tue, 12 Mar 2024 12:28:20 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Viresh Kumar <vireshk@...nel.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Vinod Koul <vkoul@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: dma: snps,dma-spear1340: Fix data{-,_}width
schema
On Mon, Mar 11, 2024 at 04:25:22PM -0600, Rob Herring wrote:
> 'data-width' and 'data_width' properties are defined as arrays, but the
> schema is defined as a matrix. That works currently since everything gets
> decoded in to matrices, but that is internal to dtschema and could change.
Can't remember now why I didn't implement that that way initially.
Probably because something didn't work back then during the
DT-bindings check procedure. Anyway thanks for fixing the schema.
Reviewed-by: Serge Semin <fancer.lancer@...il.com>
-Serge(y)
>
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> .../bindings/dma/snps,dma-spear1340.yaml | 38 +++++++++----------
> 1 file changed, 17 insertions(+), 21 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml
> index 5da8291a7de0..7b0ff4afcaa1 100644
> --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml
> +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml
> @@ -93,10 +93,9 @@ properties:
> data-width:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> description: Data bus width per each DMA master in bytes.
> + maxItems: 4
> items:
> - maxItems: 4
> - items:
> - enum: [4, 8, 16, 32]
> + enum: [4, 8, 16, 32]
>
> data_width:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> @@ -106,28 +105,26 @@ properties:
> deprecated. It' usage is discouraged in favor of data-width one. Moreover
> the property incorrectly permits to define data-bus width of 8 and 16
> bits, which is impossible in accordance with DW DMAC IP-core data book.
> + maxItems: 4
> items:
> - maxItems: 4
> - items:
> - enum:
> - - 0 # 8 bits
> - - 1 # 16 bits
> - - 2 # 32 bits
> - - 3 # 64 bits
> - - 4 # 128 bits
> - - 5 # 256 bits
> - default: 0
> + enum:
> + - 0 # 8 bits
> + - 1 # 16 bits
> + - 2 # 32 bits
> + - 3 # 64 bits
> + - 4 # 128 bits
> + - 5 # 256 bits
> + default: 0
>
> multi-block:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> description: |
> LLP-based multi-block transfer supported by hardware per
> each DMA channel.
> + maxItems: 8
> items:
> - maxItems: 8
> - items:
> - enum: [0, 1]
> - default: 1
> + enum: [0, 1]
> + default: 1
>
> snps,max-burst-len:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> @@ -138,11 +135,10 @@ properties:
> will be from 1 to max-burst-len words. It's an array property with one
> cell per channel in the units determined by the value set in the
> CTLx.SRC_TR_WIDTH/CTLx.DST_TR_WIDTH fields (data width).
> + maxItems: 8
> items:
> - maxItems: 8
> - items:
> - enum: [4, 8, 16, 32, 64, 128, 256]
> - default: 256
> + enum: [4, 8, 16, 32, 64, 128, 256]
> + default: 256
>
> snps,dma-protection-control:
> $ref: /schemas/types.yaml#/definitions/uint32
> --
> 2.43.0
>
>
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