[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <2931c3e3-054d-4085-9bd9-3b8414788675@ancud.ru>
Date: Wed, 13 Mar 2024 19:27:36 +0300
From: Nikita Kiryushin <kiryushin@...ud.ru>
To: Jani Nikula <jani.nikula@...ux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>, Tvrtko Ursulin
<tursulin@...ulin.net>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>, Matt Roper <matthew.d.roper@...el.com>,
Radhakrishna Sripada <radhakrishna.sripada@...el.com>,
Andi Shyti <andi.shyti@...ux.intel.com>,
Gustavo Sousa <gustavo.sousa@...el.com>,
Lucas De Marchi <lucas.demarchi@...el.com>,
Dnyaneshwar Bhadane <dnyaneshwar.bhadane@...el.com>,
Shekhar Chauhan <shekhar.chauhan@...el.com>,
Lionel Landwerlin <lionel.g.landwerlin@...el.com>,
intel-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] drm/i915: remove platform checks in platform-specific
handlers
Remove IS_KABYLAKE and IS_SKYLAKE in special handlers for
skylake and kabylake: the checks are done at hook initialization and are
always true in corresponding handlers.
Signed-off-by: Nikita Kiryushin <kiryushin@...ud.ru>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++---
drivers/gpu/drm/i915/intel_clock_gating.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3eacbc50caf8..8eff6be9d74c 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -601,7 +601,7 @@ static void kbl_ctx_workarounds_init(struct
intel_engine_cs *engine,
gen9_ctx_workarounds_init(engine, wal);
/* WaToEnableHwFixForPushConstHWBug:kbl */
- if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
+ if (IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
@@ -1169,7 +1169,7 @@ skl_gt_workarounds_init(struct intel_gt *gt,
struct i915_wa_list *wal)
GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
/* WaInPlaceDecompressionHang:skl */
- if (IS_SKYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0))
+ if (IS_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0))
wa_write_or(wal,
GEN9_GAMT_ECO_REG_RW_IA,
GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
@@ -1181,7 +1181,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt,
struct i915_wa_list *wal)
gen9_gt_workarounds_init(gt, wal);
/* WaDisableDynamicCreditSharing:kbl */
- if (IS_KABYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
+ if (IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
wa_write_or(wal,
GAMT_CHKN_BIT_REG,
GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c
b/drivers/gpu/drm/i915/intel_clock_gating.c
index 9c21ce69bd98..977251bcbf42 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -413,12 +413,12 @@ static void kbl_init_clock_gating(struct
drm_i915_private *i915)
intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0,
FBC_LLC_FULLY_OPEN);
/* WaDisableSDEUnitClockGating:kbl */
- if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
+ if (IS_GRAPHICS_STEP(i915, 0, STEP_C0))
intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6,
0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
/* WaDisableGamClockGating:kbl */
- if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
+ if (IS_GRAPHICS_STEP(i915, 0, STEP_C0))
intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,
0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
-- 2.34.1
Powered by blists - more mailing lists