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Message-Id: <20240314-imx95-blk-ctl-v4-4-d23de23b6ff2@nxp.com>
Date: Thu, 14 Mar 2024 21:25:13 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: Abel Vesa <abelvesa@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>
Cc: linux-clk@...r.kernel.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS CSR
module
From: Peng Fan <peng.fan@....com>
The i.MX95 LVDS_CSR provides clock gate controls for the LVDS units, LVDS
PHY and Pixel Mapper blocks. Add dt-binding for it.
Signed-off-by: Peng Fan <peng.fan@....com>
---
.../bindings/clock/nxp,imx95-lvds-csr.yaml | 50 ++++++++++++++++++++++
include/dt-bindings/clock/nxp,imx95-clock.h | 7 +++
2 files changed, 57 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
new file mode 100644
index 000000000000..e04f0ca4f588
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/nxp,imx95-lvds-csr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX95 Display LVDS Block Control
+
+maintainers:
+ - Peng Fan <peng.fan@....com>
+
+properties:
+ compatible:
+ items:
+ - const: nxp,imx95-lvds-csr
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+ description:
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell. See
+ include/dt-bindings/clock/nxp,imx95-clock.h
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@...10000 {
+ compatible = "nxp,imx95-lvds-csr", "syscon";
+ reg = <0x4c410000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&scmi_clk 75>;
+ power-domains = <&scmi_devpd 13>;
+ };
+...
diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h
index c671c4dbb4d5..e642a54c81a0 100644
--- a/include/dt-bindings/clock/nxp,imx95-clock.h
+++ b/include/dt-bindings/clock/nxp,imx95-clock.h
@@ -18,4 +18,11 @@
#define IMX95_CLK_CAMBLK_ISP 4
#define IMX95_CLK_CAMBLK_END 5
+#define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0
+#define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1
+#define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2
+#define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3
+#define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4
+#define IMX95_CLK_DISPMIX_LVDS_CSR_END 5
+
#endif /* __DT_BINDINGS_CLOCK_IMX95_H */
--
2.37.1
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