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Message-ID:
<IA1PR20MB49530065574FCB9A33252777BB282@IA1PR20MB4953.namprd20.prod.outlook.com>
Date: Fri, 15 Mar 2024 14:19:42 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Stephen Boyd <sboyd@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Chao Wei <chao.wei@...hgo.com>,
Chen Wang <unicorn_wang@...look.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Inochi Amaoto <inochiama@...look.com>, Jisheng Zhang <jszhang@...nel.org>,
Liu Gui <kenneth.liu@...hgo.com>, Jingbao Qiu <qiujingbao.dlmu@...il.com>, dlan@...too.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v9 0/6] riscv: sophgo: add clock support for Sophgo
CV1800/SG2000 SoCs
Hi, Stephen,
Ping.
Do you still have some suggestion on this patch series?
On Sat, Mar 09, 2024 at 05:01:21PM +0800, Inochi Amaoto wrote:
> Add clock controller support for the Sophgo CV1800B, CV1812H and SG2000.
>
> Changed from v8:
> 1. improve code.
> 2. remove default config in Kconfig.
> 3. merge patch 2-4 of v8 into one.
>
> Changed from v7:
> 1. fix unused variables warnings in patch 3 of v7
> 2. fix wrong pointer type in patch 3 of v7
> 3. move the clk_disp_vip_parents variable to the patch 5 to avoid warning
>
> Changed from v6:
> 1. fix dead lock when setting rate.
> 2. split the driver patch into several patch for easy reading.
>
> Changed from v5:
> 1. rebased to mainline master tree
> 2. add SG2000 clock support.
> 3. fix document link
>
> Changed from v4:
> 1. improve code for patch 2
> 2. remove the already applied bindings
> https://lore.kernel.org/all/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com/
>
> Changed from v3:
> 1. improve comment of patch 3
> 2. cleanup the include of patch 2
>
> Changed from v2:
> 1. remove clock-names from bindings.
> 2. remove clock-frequency node of DT from previous patch.
> 3. change some unused clock to bypass mode to avoid unlockable PLL.
>
> Changed from v1:
> 1. fix license issues.
>
> Inochi Amaoto (6):
> dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC
> clk: sophgo: Add clock support for CV1800 SoC
> clk: sophgo: Add clock support for CV1810 SoC
> clk: sophgo: Add clock support for SG2000 SoC
> riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
> riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC
>
> .../bindings/clock/sophgo,cv1800-clk.yaml | 3 +-
> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 +
> arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 +
> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 +-
> drivers/clk/Kconfig | 1 +
> drivers/clk/Makefile | 1 +
> drivers/clk/sophgo/Kconfig | 11 +
> drivers/clk/sophgo/Makefile | 7 +
> drivers/clk/sophgo/clk-cv1800.c | 1537 +++++++++++++++++
> drivers/clk/sophgo/clk-cv1800.h | 123 ++
> drivers/clk/sophgo/clk-cv18xx-common.c | 66 +
> drivers/clk/sophgo/clk-cv18xx-common.h | 81 +
> drivers/clk/sophgo/clk-cv18xx-ip.c | 887 ++++++++++
> drivers/clk/sophgo/clk-cv18xx-ip.h | 261 +++
> drivers/clk/sophgo/clk-cv18xx-pll.c | 420 +++++
> drivers/clk/sophgo/clk-cv18xx-pll.h | 118 ++
> 16 files changed, 3540 insertions(+), 6 deletions(-)
> create mode 100644 drivers/clk/sophgo/Kconfig
> create mode 100644 drivers/clk/sophgo/Makefile
> create mode 100644 drivers/clk/sophgo/clk-cv1800.c
> create mode 100644 drivers/clk/sophgo/clk-cv1800.h
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.c
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.h
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.c
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.h
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.c
> create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.h
>
> --
> 2.44.0
>
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