[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240315165422.GA1472059-robh@kernel.org>
Date: Fri, 15 Mar 2024 10:54:22 -0600
From: Rob Herring <robh@...nel.org>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: Abel Vesa <abelvesa@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, linux-clk@...r.kernel.org,
imx@...ts.linux.dev, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: Re: [PATCH v4 1/6] dt-bindindgs: clock: nxp: support i.MX95 VPU CSR
module
On Thu, Mar 14, 2024 at 09:25:10PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@....com>
>
> The i.MX95 VPU_CSR contains control and status registers for VPU
> status, pending transaction status, and clock gating controls.
>
> This patch is to add clock features for VPU CSR.
>
> Signed-off-by: Peng Fan <peng.fan@....com>
> ---
> .../bindings/clock/nxp,imx95-vpu-csr.yaml | 50 ++++++++++++++++++++++
> include/dt-bindings/clock/nxp,imx95-clock.h | 14 ++++++
> 2 files changed, 64 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml
> new file mode 100644
> index 000000000000..4a1c6dcfe3f8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nxp,imx95-vpu-csr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX95 VPUMIX Block Control
> +
> +maintainers:
> + - Peng Fan <peng.fan@....com>
> +
> +properties:
> + compatible:
> + items:
> + - const: nxp,imx95-vpu-csr
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> + description:
> + The clock consumer should specify the desired clock by having the clock
> + ID in its "clocks" phandle cell. See
> + include/dt-bindings/clock/nxp,imx95-clock.h
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@...10000 {
> + compatible = "nxp,imx95-vpu-csr", "syscon";
> + reg = <0x4c410000 0x10000>;
> + #clock-cells = <1>;
> + clocks = <&scmi_clk 114>;
> + power-domains = <&scmi_devpd 21>;
> + };
> +...
> diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h
> new file mode 100644
> index 000000000000..9d8f0a6d12d0
> --- /dev/null
> +++ b/include/dt-bindings/clock/nxp,imx95-clock.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_IMX95_H
> +#define __DT_BINDINGS_CLOCK_IMX95_H
> +
> +#define IMX95_CLK_VPUBLK_WAVE 0
> +#define IMX95_CLK_VPUBLK_JPEG_ENC 1
> +#define IMX95_CLK_VPUBLK_JPEG_DEC 2
> +#define IMX95_CLK_VPUBLK_END 3
If this number can change, then it is not ABI and doesn't go in this
header. With that dropped,
Reviewed-by: Rob Herring <robh@...nel.org>
Powered by blists - more mailing lists