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Message-ID: <ZfjFP7E0ME5yHJZC@google.com>
Date: Mon, 18 Mar 2024 22:50:39 +0000
From: Mingwei Zhang <mizhang@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, Jim Mattson <jmattson@...gle.com>
Subject: Re: [PATCH 2/3] perf/x86/intel: Expose existence of callback support
to KVM
On Wed, Mar 06, 2024, Sean Christopherson wrote:
> Add a "has_callstack" field to the x86_pmu_lbr structure used to pass
> information to KVM, and set it accordingly in x86_perf_get_lbr(). KVM
> will use has_callstack to avoid trying to create perf LBR events with
> PERF_SAMPLE_BRANCH_CALL_STACK on CPUs that don't support callstacks.
>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
Reviewed-by: Mingwei Zhang <mizhang@...gle.com>
> ---
> arch/x86/events/intel/lbr.c | 1 +
> arch/x86/include/asm/perf_event.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
> index 78cd5084104e..4367aa77cb8d 100644
> --- a/arch/x86/events/intel/lbr.c
> +++ b/arch/x86/events/intel/lbr.c
> @@ -1693,6 +1693,7 @@ void x86_perf_get_lbr(struct x86_pmu_lbr *lbr)
> lbr->from = x86_pmu.lbr_from;
> lbr->to = x86_pmu.lbr_to;
> lbr->info = x86_pmu.lbr_info;
> + lbr->has_callstack = x86_pmu_has_lbr_callstack();
> }
> EXPORT_SYMBOL_GPL(x86_perf_get_lbr);
>
> diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
> index 3736b8a46c04..7f1e17250546 100644
> --- a/arch/x86/include/asm/perf_event.h
> +++ b/arch/x86/include/asm/perf_event.h
> @@ -555,6 +555,7 @@ struct x86_pmu_lbr {
> unsigned int from;
> unsigned int to;
> unsigned int info;
> + bool has_callstack;
> };
>
> extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);
> --
> 2.44.0.278.ge034bb2e1d-goog
>
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