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Message-ID: <2727312.mvXUDI8C0e@steina-w>
Date: Mon, 18 Mar 2024 10:35:18 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Marco Felsch <m.felsch@...gutronix.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux@...tq-group.com
Subject: Re: [PATCH 1/1] ARM: dts: imx6ul: tqma6ul + mba6ulx: Fix pinctrl node names
Hi Marco,
Am Sonntag, 17. März 2024, 17:22:14 CET schrieb Marco Felsch:
> Hi Alexander,
>
> just a minor, please see below.
>
> On 24-03-14, Alexander Stein wrote:
> > imx6ul pinctrl nodes end with 'grp'. Fix node names.
> >
> > Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
> > ---
> > arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi | 2 +-
> > arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi | 6 +++---
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi
> > index 57e647fc3237..f04c6f71f538 100644
> > --- a/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi
> > +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi
> > @@ -202,7 +202,7 @@ MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x4001b8b0
> > >;
> > };
> >
> > - pinctrl_pmic: pmic {
> > + pinctrl_pmic: grp {
> ^
> pmicgrp
Nice catch. Will be fixed in v2. Thanks.
Best regards,
Alexander
>
> > fsl,pins = <
> > /* PMIC irq */
> > MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x1b099
> > diff --git a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi
> > index e78d0a7d8cd2..5258ef81e6c7 100644
> > --- a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi
> > +++ b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi
> > @@ -505,7 +505,7 @@ MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b1
> > >;
> > };
> >
> > - pinctrl_uart6dte: uart6dte {
> > + pinctrl_uart6dte: uart6dtegrp {
> > fsl,pins = <
> > MX6UL_PAD_CSI_PIXCLK__UART6_DTE_TX 0x1b0b1
> > MX6UL_PAD_CSI_MCLK__UART6_DTE_RX 0x1b0b1
> > @@ -537,7 +537,7 @@ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
> > >;
> > };
> >
> > - pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
> > + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> > fsl,pins = <
> > MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
> > MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170b9
> > @@ -552,7 +552,7 @@ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
> > >;
> > };
> >
> > - pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
> > + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> > fsl,pins = <
> > MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
> > MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170f9
>
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