linux-kernel - Re: [PATCH v6 0/2] mmc: sdhci-of-dwcmshc: Add CQE support

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Date: Mon, 18 Mar 2024 12:40:17 +0300
From: Sergey Khimich <serghox@...il.com>
To: Ulf Hansson <ulf.hansson@...aro.org>
Cc: linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
 Adrian Hunter <adrian.hunter@...el.com>, Shawn Lin
 <shawn.lin@...k-chips.com>, Jyan Chou <jyanchou@...ltek.com>
Subject: Re: [PATCH v6 0/2] mmc: sdhci-of-dwcmshc: Add CQE support

Hello, Uffe!

Thanks for the info! I'll update mailing list in the next v7 version of 
my patch set. I'll send it anyway to fix last comments from Adrian Hunter.

On 15.03.2024 13:55, Ulf Hansson wrote:
> On Thu, 14 Mar 2024 at 15:14, Sergey Khimich <serghox@...il.com> wrote:
>> Hello!
>>
>> This is implementation of SDHCI CQE support for sdhci-of-dwcmshc driver.
>> For enabling CQE support just set 'supports-cqe' in your DevTree file
>> for appropriate mmc node.
>>
>> Also, while implementing CQE support for the driver, I faced with a problem
>> which I will describe below.
>> According to the IP block documentation CQE works only with "AMDA-2 only"
>> mode which is activated only with v4 mode enabled. I see in dwcmshc_probe()
>> function that v4 mode gets enabled only for 'sdhci_dwcmshc_bf3_pdata'
>> platform data.
>>
>> So my question is: is it correct to enable v4 mode for all platform data
>> if 'SDHCI_CAN_64BIT_V4' bit is set in hw?
>>
>> Because I`m afraid that enabling v4 mode for some platforms could break
>> them down. On the other hand, if host controller says that it can do v4
>> (caps & SDHCI_CAN_64BIT_V4), lets do v4 or disable it manualy by some
>> quirk. Anyway - RFC.
>>
> We have just updated the bouncing addresses in MAINTAINERS for Asutosh
> Das and Ritesh Harjani, that also helps maintain cqhci. Would you mind
> re-submitting to allow them to have a look at this too?
> Asutosh Das <quic_asutoshd@...cinc.com>
> Ritesh Harjani <ritesh.list@...il.com>
>
> Kind regards
> Uffe
>
>> v2:
>>   - Added dwcmshc specific cqe_disable hook to prevent losing
>>     in-flight cmd when an ioctl is issued and cqe_disable is called;
>>
>>   - Added processing 128Mb boundary for the host memory data buffer size
>>     and the data buffer. For implementing this processing an extra
>>     callback is added to the struct 'sdhci_ops'.
>>
>>   - Fixed typo.
>>
>> v3:
>>   - Fix warning reported by kernel test robot:
>>          | Reported-by: kernel test robot <lkp@...el.com>
>>          | Closes: https://lore.kernel.org/oe-kbuild-all/202309270807.VoVn81m6-lkp@intel.com/
>>          | Closes: https://lore.kernel.org/oe-kbuild-all/202309300806.dcR19kcE-lkp@intel.com/
>>
>> v4:
>>   - Data reset moved to custom driver tuning hook.
>>   - Removed unnecessary dwcmshc_sdhci_cqe_disable() func
>>   - Removed unnecessary dwcmshc_cqhci_set_tran_desc. Export and use
>>     cqhci_set_tran_desc() instead.
>>   - Provide a hook for cqhci_set_tran_desc() instead of cqhci_prep_tran_desc().
>>   - Fix typo: int_clok_disable --> int_clock_disable
>>
>> v5:
>>   - Fix warning reported by kernel test robot:
>>          | Reported-by: kernel test robot <lkp@...el.com>
>>          | Closes: https://lore.kernel.org/oe-kbuild-all/202312301130.itEZhhI5-lkp@intel.com/
>>
>> v6:
>>   - Rebase to master branch
>>   - Fix typo;
>>   - Fix double blank line;
>>   - Add cqhci_suspend() and cqhci_resume() functions
>>     to support mmc suspend-to-ram (s2r);
>>   - Move reading DWCMSHC_P_VENDOR_AREA2 register under "supports-cqe"
>>     condition as not all IPs have that register;
>>   - Remove sdhci V4 mode from the list of prerequisites to init cqhci.
>>
>>
>> Sergey Khimich (2):
>>    mmc: cqhci: Add cqhci set_tran_desc() callback
>>    mmc: sdhci-of-dwcmshc: Implement SDHCI CQE support
>>
>>   drivers/mmc/host/Kconfig            |   1 +
>>   drivers/mmc/host/cqhci-core.c       |  11 +-
>>   drivers/mmc/host/cqhci.h            |   4 +
>>   drivers/mmc/host/sdhci-of-dwcmshc.c | 188 +++++++++++++++++++++++++++-
>>   4 files changed, 199 insertions(+), 5 deletions(-)
>>
>> --
>> 2.30.2
>>