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Message-ID: <7a0774c7851e525b1f245cff747d0034b35edc79.camel@mediatek.com>
Date: Tue, 19 Mar 2024 07:34:51 +0000
From: Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>
To: CK Hu (胡俊光) <ck.hu@...iatek.com>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>, "chunkuang.hu@...nel.org"
<chunkuang.hu@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
Bibby Hsieh (謝濟遠) <Bibby.Hsieh@...iatek.com>,
"jason-ch.chen@...iatek.corp-partner.google.com"
<jason-ch.chen@...iatek.corp-partner.google.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
"daniel@...ll.ch" <daniel@...ll.ch>, "p.zabel@...gutronix.de"
<p.zabel@...gutronix.de>, "seanpaul@...omium.org" <seanpaul@...omium.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"airlied@...il.com" <airlied@...il.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>, "fshao@...omium.org" <fshao@...omium.org>
Subject: Re: [PATCH v5 06/13] drm/mediatek: Turn off the layers with zero
width or height
Hi CK,
On Fri, 2024-03-01 at 07:51 +0000, CK Hu (胡俊光) wrote:
> Hi, Hsiao-chien:
>
> On Thu, 2024-02-15 at 18:11 +0800, Hsiao Chien Sung wrote:
> > We found that IGT (Intel GPU Tool) will try to commit layers with
> > zero width or height and lead to undefined behaviors in hardware.
> > Disable the layers in such a situation.
>
> Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> I have reviewed ovl driver, ovl does not have this limitation, so
> it's
> better to point out which hardware has this limitation. That's OK if
> you have no information.
>
Thank you for the confirmation. After checking with the designer, for
MT8195/MT8188, the height setting in OVL can be 0 but width cannot,
otherwise the hardware could hang. Although we are not sure if other
old platforms have the same behavior.
Regards,
Shawn
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