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Message-ID: <ZfrqWec_eiPw1uzd@nanopsycho>
Date: Wed, 20 Mar 2024 14:53:29 +0100
From: Jiri Pirko <jiri@...nulli.us>
To: Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
Cc: netdev@...r.kernel.org, davem@...emloft.net, kuba@...nel.org,
pabeni@...hat.com, edumazet@...gle.com,
linux-kernel@...r.kernel.org, bryan.whitehead@...rochip.com,
UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net V2 1/2] net: lan743x: disable WOL upon resume to
restore full data path operation
Wed, Mar 20, 2024 at 05:21:06AM CET, Raju.Lakkaraju@...rochip.com wrote:
>In order for datapath to be restored to normal functionality after resume
>we disable all wakeup events. Additionally we clear all W1C status bits by
>writing 1's to them.
Not sure who's "we", but in the patch description, it is good to
describe the problem first and then to describe the fix but telling the
codebase what to do/change/fix in imperative mood:
https://www.kernel.org/doc/html/v6.6/process/submitting-patches.html#describe-your-changes
>
>Fixes: 4d94282afd95 ("lan743x: Add power management support")
>Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
>---
>Change List:
>------------
>V1 -> V2:
> - Repost - No change
>V0 -> V1:
> - Variable "data" change from "int" to "unsigned int"
>
> drivers/net/ethernet/microchip/lan743x_main.c | 24 ++++++++++++++++++-
> drivers/net/ethernet/microchip/lan743x_main.h | 24 +++++++++++++++++++
> 2 files changed, 47 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c
>index bd8aa83b47e5..385e9dcd8cd9 100644
>--- a/drivers/net/ethernet/microchip/lan743x_main.c
>+++ b/drivers/net/ethernet/microchip/lan743x_main.c
>@@ -3550,7 +3550,7 @@ static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
>
> /* clear wake settings */
> pmtctl = lan743x_csr_read(adapter, PMT_CTL);
>- pmtctl |= PMT_CTL_WUPS_MASK_;
>+ pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_;
> pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
> PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
> PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
>@@ -3685,6 +3685,7 @@ static int lan743x_pm_resume(struct device *dev)
> struct pci_dev *pdev = to_pci_dev(dev);
> struct net_device *netdev = pci_get_drvdata(pdev);
> struct lan743x_adapter *adapter = netdev_priv(netdev);
>+ u32 data;
> int ret;
>
> pci_set_power_state(pdev, PCI_D0);
>@@ -3715,6 +3716,27 @@ static int lan743x_pm_resume(struct device *dev)
> netif_info(adapter, drv, adapter->netdev,
> "Wakeup source : 0x%08X\n", ret);
>
>+ /* Clear the wol configuration and status bits when system
>+ * events occurs.
>+ * The status bits are "Write One to Clear (W1C)"
>+ */
>+ data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ |
>+ MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ |
>+ MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_;
>+ lan743x_csr_write(adapter, MAC_WUCSR, data);
>+
>+ data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ |
>+ MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_;
>+ lan743x_csr_write(adapter, MAC_WUCSR2, data);
>+
>+ data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ |
>+ MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ |
>+ MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ |
>+ MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ |
>+ MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ |
>+ MAC_WK_SRC_WK_FR_SAVED_;
>+ lan743x_csr_write(adapter, MAC_WK_SRC, data);
>+
> return 0;
> }
>
>diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/ethernet/microchip/lan743x_main.h
>index be79cb0ae5af..77fc3abc1428 100644
>--- a/drivers/net/ethernet/microchip/lan743x_main.h
>+++ b/drivers/net/ethernet/microchip/lan743x_main.h
>@@ -60,6 +60,7 @@
> #define PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ BIT(18)
> #define PMT_CTL_GPIO_WAKEUP_EN_ BIT(15)
> #define PMT_CTL_EEE_WAKEUP_EN_ BIT(13)
>+#define PMT_CTL_RES_CLR_WKP_MASK_ GENMASK(9, 8)
> #define PMT_CTL_READY_ BIT(7)
> #define PMT_CTL_ETH_PHY_RST_ BIT(4)
> #define PMT_CTL_WOL_EN_ BIT(3)
>@@ -226,12 +227,31 @@
> #define MAC_WUCSR (0x140)
> #define MAC_MP_SO_EN_ BIT(21)
> #define MAC_WUCSR_RFE_WAKE_EN_ BIT(14)
>+#define MAC_WUCSR_EEE_TX_WAKE_ BIT(13)
>+#define MAC_WUCSR_EEE_RX_WAKE_ BIT(11)
>+#define MAC_WUCSR_RFE_WAKE_FR_ BIT(9)
>+#define MAC_WUCSR_PFDA_FR_ BIT(7)
>+#define MAC_WUCSR_WUFR_ BIT(6)
>+#define MAC_WUCSR_MPR_ BIT(5)
>+#define MAC_WUCSR_BCAST_FR_ BIT(4)
> #define MAC_WUCSR_PFDA_EN_ BIT(3)
> #define MAC_WUCSR_WAKE_EN_ BIT(2)
> #define MAC_WUCSR_MPEN_ BIT(1)
> #define MAC_WUCSR_BCST_EN_ BIT(0)
>
> #define MAC_WK_SRC (0x144)
>+#define MAC_WK_SRC_ETH_PHY_WK_ BIT(17)
>+#define MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ BIT(16)
>+#define MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ BIT(15)
>+#define MAC_WK_SRC_EEE_TX_WK_ BIT(14)
>+#define MAC_WK_SRC_EEE_RX_WK_ BIT(13)
>+#define MAC_WK_SRC_RFE_FR_WK_ BIT(12)
>+#define MAC_WK_SRC_PFDA_FR_WK_ BIT(11)
>+#define MAC_WK_SRC_MP_FR_WK_ BIT(10)
>+#define MAC_WK_SRC_BCAST_FR_WK_ BIT(9)
>+#define MAC_WK_SRC_WU_FR_WK_ BIT(8)
>+#define MAC_WK_SRC_WK_FR_SAVED_ BIT(7)
>+
> #define MAC_MP_SO_HI (0x148)
> #define MAC_MP_SO_LO (0x14C)
>
>@@ -294,6 +314,10 @@
> #define RFE_INDX(index) (0x580 + (index << 2))
>
> #define MAC_WUCSR2 (0x600)
>+#define MAC_WUCSR2_NS_RCD_ BIT(7)
>+#define MAC_WUCSR2_ARP_RCD_ BIT(6)
>+#define MAC_WUCSR2_IPV6_TCPSYN_RCD_ BIT(5)
>+#define MAC_WUCSR2_IPV4_TCPSYN_RCD_ BIT(4)
>
> #define SGMII_ACC (0x720)
> #define SGMII_ACC_SGMII_BZY_ BIT(31)
>--
>2.34.1
>
>
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