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Message-Id: <20240321080228.24147-2-bin.yao@ingenic.com>
Date: Thu, 21 Mar 2024 16:02:28 +0800
From: bin.yao@...enic.com
To: vkoul@...nel.org
Cc: robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org,
dmaengine@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
1587636487@...com,
"bin.yao" <bin.yao@...enic.com>
Subject: [PATCH 2/2] dt-bindings: dma: Convert ingenic-pdma doc to YAML
From: "bin.yao" <bin.yao@...enic.com>
Convert the textual documentation for the Ingenic SoCs PDMA Controller
devicetree binding to YAML.
Signed-off-by: bin.yao <bin.yao@...enic.com>
---
.../devicetree/bindings/dma/ingenic,pdma.yaml | 67 +++++++++++++++++++
include/dt-bindings/dma/ingenic-pdma.h | 45 +++++++++++++
2 files changed, 112 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ingenic,pdma.yaml
create mode 100644 include/dt-bindings/dma/ingenic-pdma.h
diff --git a/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml
new file mode 100644
index 000000000000..290dbf182a01
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs PDMA Controller
+
+maintainers:
+ - bin.yao <bin.yao@...enic.com>
+
+allOf:
+ - $ref: dma-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - ingenic,t33-pdma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupts-names:
+ const: pdma
+
+ "#dma-cells":
+ const: 1
+
+ dma-channels:
+ const: 32
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: gate_pdma
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupts-names
+ - "#dma-cells"
+ - dma-channels
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
+ pdma:dma@...20000 {
+ compatible = "ingenic,t33-pdma";
+ reg = <0x13420000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupt-names = "pdma";
+ interrupts = <10>;
+ #dma-cells = <0x1>;
+ dma-channels = <0x20>;
+ clocks = <&cgu JZ4780_CLK_PDMA>;
+ clock-names = "gate_pdma";
+ };
+
diff --git a/include/dt-bindings/dma/ingenic-pdma.h b/include/dt-bindings/dma/ingenic-pdma.h
new file mode 100644
index 000000000000..66188d588232
--- /dev/null
+++ b/include/dt-bindings/dma/ingenic-pdma.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (C) 2024 Ingenic Semiconductor Co., Ltd.
+ * Author: bin.yao <bin.yao@...enic.com>
+ */
+
+#ifndef __DT_BINDINGS_INGENIC_PDMA_H__
+#define __DT_BINDINGS_INGENIC_PDMA_H__
+
+/*
+ * Request type numbers for the INGENIC DMA controller.
+ */
+#define INGENIC_DMA_REQ_AIC_LOOP_RX 0x5
+#define INGENIC_DMA_REQ_AIC_TX 0x6
+#define INGENIC_DMA_REQ_AIC_F_RX 0x7
+#define INGENIC_DMA_REQ_AUTO_TX 0x8
+#define INGENIC_DMA_REQ_SADC_RX 0x9
+#define INGENIC_DMA_REQ_UART5_TX 0xa
+#define INGENIC_DMA_REQ_UART5_RX 0xb
+#define INGENIC_DMA_REQ_UART4_TX 0xc
+#define INGENIC_DMA_REQ_UART4_RX 0xd
+#define INGENIC_DMA_REQ_UART3_TX 0xe
+#define INGENIC_DMA_REQ_UART3_RX 0xf
+#define INGENIC_DMA_REQ_UART2_TX 0x10
+#define INGENIC_DMA_REQ_UART2_RX 0x11
+#define INGENIC_DMA_REQ_UART1_TX 0x12
+#define INGENIC_DMA_REQ_UART1_RX 0x13
+#define INGENIC_DMA_REQ_UART0_TX 0x14
+#define INGENIC_DMA_REQ_UART0_RX 0x15
+#define INGENIC_DMA_REQ_SSI0_TX 0x16
+#define INGENIC_DMA_REQ_SSI0_RX 0x17
+#define INGENIC_DMA_REQ_SSI1_TX 0x18
+#define INGENIC_DMA_REQ_SSI1_RX 0x19
+#define INGENIC_DMA_REQ_SLV_TX 0x1a
+#define INGENIC_DMA_REQ_SLV_RX 0x1b
+#define INGENIC_DMA_REQ_I2C0_TX 0x24
+#define INGENIC_DMA_REQ_I2C0_RX 0x25
+#define INGENIC_DMA_REQ_I2C1_TX 0x26
+#define INGENIC_DMA_REQ_I2C1_RX 0x27
+#define INGENIC_DMA_REQ_I2C2_TX 0x28
+#define INGENIC_DMA_REQ_I2C2_RX 0x29
+#define INGENIC_DMA_REQ_DES_TX 0x2e
+#define INGENIC_DMA_REQ_DES_RX 0x2f
+
+#endif /* __DT_BINDINGS_INGENIC_PDMA_H__ */
--
2.17.1
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