linux-kernel - Re: [PATCH v2 00/21] Add PCIe bridge node in DT for Qcom SoCs

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Message-ID: <cf8fb32d-3061-42e7-aa7d-4624c2bf413b@linaro.org>
Date: Sat, 23 Mar 2024 01:11:33 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, cros-qcom-dts-watchers@...omium.org,
 Rob Herring <robh@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Neil Armstrong <neil.armstrong@...aro.org>
Subject: Re: [PATCH v2 00/21] Add PCIe bridge node in DT for Qcom SoCs

On 21.03.2024 12:16, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, this series adds a DT node for the
> PCIe bridges across all SoCs.
> 
> There is no functionality change with this series, but the PCIe bridge
> representation in DT will be necessary to add the DT node for the client
> devices like the one proposed in power sequencing series [1].
> 
> - Mani
> 
> [1] https://lore.kernel.org/linux-arm-msm/20240216203215.40870-8-brgl@bgdev.pl/
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---

Everything looks good

Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad