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Message-ID: <171125314173.10875.16635973743967685352.tip-bot2@tip-bot2>
Date: Sun, 24 Mar 2024 04:05:41 -0000
From: "tip-bot2 for Tom Lendacky" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Tom Lendacky <thomas.lendacky@....com>, Ingo Molnar <mingo@...nel.org>,
 Ard Biesheuvel <ardb@...nel.org>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/boot/64: Apply encryption mask to 5-level
 pagetable update

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     4d0d7e7852752ea56375ac8645f0239e21ca2b50
Gitweb:        https://git.kernel.org/tip/4d0d7e7852752ea56375ac8645f0239e21ca2b50
Author:        Tom Lendacky <thomas.lendacky@....com>
AuthorDate:    Fri, 22 Mar 2024 10:41:06 -05:00
Committer:     Ingo Molnar <mingo@...nel.org>
CommitterDate: Sun, 24 Mar 2024 05:00:35 +01:00

x86/boot/64: Apply encryption mask to 5-level pagetable update

When running with 5-level page tables, the kernel mapping PGD entry is
updated to point to the P4D table. The assignment uses _PAGE_TABLE_NOENC,
which, when SME is active (mem_encrypt=on), results in a page table
entry without the encryption mask set, causing the system to crash on
boot.

Change the assignment to use _PAGE_TABLE instead of _PAGE_TABLE_NOENC so
that the encryption mask is set for the PGD entry.

Fixes: 533568e06b15 ("x86/boot/64: Use RIP_REL_REF() to access early_top_pgt[]")
Signed-off-by: Tom Lendacky <thomas.lendacky@....com>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Reviewed-by: Ard Biesheuvel <ardb@...nel.org>
Link: https://lore.kernel.org/r/8f20345cda7dbba2cf748b286e1bc00816fe649a.1711122067.git.thomas.lendacky@amd.com
---
 arch/x86/kernel/head64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 212e8e0..7d2eb03 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -175,7 +175,7 @@ unsigned long __head __startup_64(unsigned long physaddr,
 		p4d = (p4dval_t *)&RIP_REL_REF(level4_kernel_pgt);
 		p4d[MAX_PTRS_PER_P4D - 1] += load_delta;
 
-		pgd[pgd_index(__START_KERNEL_map)] = (pgdval_t)p4d | _PAGE_TABLE_NOENC;
+		pgd[pgd_index(__START_KERNEL_map)] = (pgdval_t)p4d | _PAGE_TABLE;
 	}
 
 	RIP_REL_REF(level3_kernel_pgt)[PTRS_PER_PUD - 2].pud += load_delta;

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