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Message-ID: <87r0fv6ddb.fsf@email.froward.int.ebiederm.org>
Date: Wed, 27 Mar 2024 07:57:52 -0500
From: "Eric W. Biederman" <ebiederm@...ssion.com>
To: Steve Wahl <steve.wahl@....com>
Cc: Russ Anderson <rja@....com>,  Ingo Molnar <mingo@...nel.org>,  Dave
 Hansen <dave.hansen@...ux.intel.com>,  Andy Lutomirski <luto@...nel.org>,
  Peter Zijlstra <peterz@...radead.org>,  Thomas Gleixner
 <tglx@...utronix.de>,  Ingo Molnar <mingo@...hat.com>,  Borislav Petkov
 <bp@...en8.de>,  x86@...nel.org,  "H. Peter Anvin" <hpa@...or.com>,
  linux-kernel@...r.kernel.org,  Linux regressions mailing list
 <regressions@...ts.linux.dev>,  Pavin Joseph <me@...injoseph.com>,
  stable@...r.kernel.org,  Eric Hagberg <ehagberg@...il.com>,  Simon Horman
 <horms@...ge.net.au>,  Dave Young <dyoung@...hat.com>,  Sarah Brofeldt
 <srhb@....dk>,  Dimitri Sivanich <sivanich@....com>
Subject: Re: [PATCH] x86/mm/ident_map: Use full gbpages in identity maps
 except on UV platform.

Steve Wahl <steve.wahl@....com> writes:

> On Mon, Mar 25, 2024 at 10:04:41AM -0500, Eric W. Biederman wrote:
>> Russ Anderson <rja@....com> writes:
>> > Steve can certainly merge his two patches and resubmit, to replace the
>> > reverted original patch.  He should be on in the morning to speak for
>> > himself.
>> 
>> I am going to push back and suggest that this is perhaps a bug in the
>> HPE UV systems firmware not setting up the cpus memory type range
>> registers correctly.
>> 
>> Unless those systems are using new fangled cpus that don't have 16bit
>> and 32bit support, and don't implement memory type range registers,
>> I don't see how something that only affects HPE UV systems could be
>> anything except an HPE UV specific bug.
>
> Eric,
>
> I took the time to communicate with others in the company who know
> this stuff better than I do before replying on this.
>
> One of the problems with using the MTRRs for this is that there are
> simply not enough of them.  The MTRRs size/alignment requirements mean
> that more than one entry would be required per reserved region, and we
> need one reserved region per socket on systems that currently can go
> up to 32 sockets.  (In case you would think to ask, the reserved
> regions also cannot be made contiguous.)
>
> So MTRRs will not work to keep speculation out of our reserved memory
> regions.
>
> Let me know if you need more information from us on this.

Thanks for this.

Do you know if there are enough MTRRs for the first 4GB?

I am curious if kexec should even consider going into 32bit mode without
page tables or even into 16bit mode on such a system.  Or if such a
system will always require using page tables.

If you don't have enough MTRRs on a big NUMA system I think it is
perfectly understandable, to need to use the page tables.

Please include this the fact that splitting GBpages is necessary because
of a lack of MTRRs in the change description.

Given that it is the lack of MTRRs on a large NUMA system that make the
change necessary.   The goes from a pure bug fix change to a change to
accommodate systems without enough MTRRs.

That information makes it more understandable why older systems (at
least in the case of kexec) might not be ok with the change.  As for
older systems their MTRRs are sufficient and thus they can use fewer
page table entries.  Allowing for use of larger TLB entries.


Eric

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