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Message-ID: <4f89f7e4-cd89-42a7-a13e-5eb25f7b2f4e@sifive.com>
Date: Wed, 27 Mar 2024 11:30:15 -0500
From: Samuel Holland <samuel.holland@...ive.com>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 2/3] clocksource/drivers/timer-clint: Add
set_state_shutdown
Hi Jisheng,
On 2024-03-27 10:35 AM, Jisheng Zhang wrote:
> Add clocksource detach/shutdown callback to disable RISC-V timer interrupt when
> switching out clockevent from clint timer to another timer.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
> drivers/clocksource/timer-clint.c | 18 ++++++++++++++----
> 1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
> index 09fd292eb83d..56cf6c672e6d 100644
> --- a/drivers/clocksource/timer-clint.c
> +++ b/drivers/clocksource/timer-clint.c
> @@ -119,11 +119,21 @@ static int clint_clock_next_event(unsigned long delta,
> return 0;
> }
>
> +static int clint_clock_shutdown(struct clock_event_device *evt)
> +{
> + void __iomem *r = clint_timer_cmp +
> + cpuid_to_hartid_map(smp_processor_id());
> +
> + writeq_relaxed(ULONG_MAX, r);
This needs to be ULLONG_MAX to produce a 64-bit value on riscv32.
Regards,
Samuel
> + return 0;
> +}
> +
> static DEFINE_PER_CPU(struct clock_event_device, clint_clock_event) = {
> - .name = "clint_clockevent",
> - .features = CLOCK_EVT_FEAT_ONESHOT,
> - .rating = 100,
> - .set_next_event = clint_clock_next_event,
> + .name = "clint_clockevent",
> + .features = CLOCK_EVT_FEAT_ONESHOT,
> + .rating = 100,
> + .set_next_event = clint_clock_next_event,
> + .set_state_shutdown = clint_clock_shutdown,
> };
>
> static int clint_timer_starting_cpu(unsigned int cpu)
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