[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240215-topic-pci_sleep-v2-1-79334884546b@linaro.org>
Date: Wed, 27 Mar 2024 19:24:49 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH v2] PCI: dwc: Use the correct sleep function in
wait_for_link
According to [1], msleep should be used for large sleeps, such as the
100-ish ms one in this function. Comply with the guide and use it.
[1] https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Tested on Qualcomm SC8280XP CRD
---
Changes in v2:
- Rename the define
- Sleep for 90ms (the lower boundary) instead of 100
- Link to v1: https://lore.kernel.org/r/20240215-topic-pci_sleep-v1-1-7ac79ac9739a@linaro.org
---
drivers/pci/controller/dwc/pcie-designware.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.h | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 250cf7f40b85..62915e4b2ebd 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -655,7 +655,7 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci)
if (dw_pcie_link_up(pci))
break;
- usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
+ msleep(LINK_WAIT_SLEEP_MS);
}
if (retries >= LINK_WAIT_MAX_RETRIES) {
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 26dae4837462..b17e8ff54f55 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -63,8 +63,7 @@
/* Parameters for the waiting for link up routine */
#define LINK_WAIT_MAX_RETRIES 10
-#define LINK_WAIT_USLEEP_MIN 90000
-#define LINK_WAIT_USLEEP_MAX 100000
+#define LINK_WAIT_SLEEP_MS 90
/* Parameters for the waiting for iATU enabled routine */
#define LINK_WAIT_MAX_IATU_RETRIES 5
---
base-commit: 26074e1be23143b2388cacb36166766c235feb7c
change-id: 20240215-topic-pci_sleep-368108a1fb6f
Best regards,
--
Konrad Dybcio <konrad.dybcio@...aro.org>
Powered by blists - more mailing lists