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Message-ID: <20240327185222.98998-2-john.allen@amd.com>
Date: Wed, 27 Mar 2024 18:52:19 +0000
From: John Allen <john.allen@....com>
To: <bp@...en8.de>, <linux-edac@...r.kernel.org>, <tony.luck@...el.com>,
<yazen.ghannam@....com>
CC: <linux-kernel@...r.kernel.org>, <avadhut.naik@....com>,
<muralidhara.mk@....com>, John Allen <john.allen@....com>
Subject: [PATCH v2 1/4] RAS/AMD/ATL: Read DRAM hole base early
Read DRAM hole base when constructing the address map as the value will
not change during run time.
Signed-off-by: John Allen <john.allen@....com>
---
v2:
- Fix compilation error. ctx->addr should read ctx->ret_addr.
- Improve commit description.
---
drivers/ras/amd/atl/core.c | 15 ++-------------
drivers/ras/amd/atl/internal.h | 2 ++
drivers/ras/amd/atl/system.c | 21 +++++++++++++++++++++
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/ras/amd/atl/core.c b/drivers/ras/amd/atl/core.c
index 6dc4e06305f7..63513d972c07 100644
--- a/drivers/ras/amd/atl/core.c
+++ b/drivers/ras/amd/atl/core.c
@@ -51,22 +51,11 @@ static bool legacy_hole_en(struct addr_ctx *ctx)
static int add_legacy_hole(struct addr_ctx *ctx)
{
- u32 dram_hole_base;
- u8 func = 0;
-
if (!legacy_hole_en(ctx))
return 0;
- if (df_cfg.rev >= DF4)
- func = 7;
-
- if (df_indirect_read_broadcast(ctx->node_id, func, 0x104, &dram_hole_base))
- return -EINVAL;
-
- dram_hole_base &= DF_DRAM_HOLE_BASE_MASK;
-
- if (ctx->ret_addr >= dram_hole_base)
- ctx->ret_addr += (BIT_ULL(32) - dram_hole_base);
+ if (ctx->ret_addr >= df_cfg.dram_hole_base)
+ ctx->ret_addr += (BIT_ULL(32) - df_cfg.dram_hole_base);
return 0;
}
diff --git a/drivers/ras/amd/atl/internal.h b/drivers/ras/amd/atl/internal.h
index 5de69e0bb0f9..1413c8ddc6c5 100644
--- a/drivers/ras/amd/atl/internal.h
+++ b/drivers/ras/amd/atl/internal.h
@@ -132,6 +132,8 @@ struct df_config {
/* Number of DRAM Address maps visible in a Coherent Station. */
u8 num_coh_st_maps;
+ u32 dram_hole_base;
+
/* Global flags to handle special cases. */
struct df_flags flags;
};
diff --git a/drivers/ras/amd/atl/system.c b/drivers/ras/amd/atl/system.c
index 701349e84942..6f6fe24dec81 100644
--- a/drivers/ras/amd/atl/system.c
+++ b/drivers/ras/amd/atl/system.c
@@ -223,6 +223,21 @@ static int determine_df_rev(void)
return -EINVAL;
}
+static int get_dram_hole_base(void)
+{
+ u8 func = 0;
+
+ if (df_cfg.rev >= DF4)
+ func = 7;
+
+ if (df_indirect_read_broadcast(0, func, 0x104, &df_cfg.dram_hole_base))
+ return -EINVAL;
+
+ df_cfg.dram_hole_base &= DF_DRAM_HOLE_BASE_MASK;
+
+ return 0;
+}
+
static void get_num_maps(void)
{
switch (df_cfg.rev) {
@@ -266,6 +281,7 @@ static void dump_df_cfg(void)
pr_debug("num_coh_st_maps=%u", df_cfg.num_coh_st_maps);
+ pr_debug("dram_hole_base=%x", df_cfg.dram_hole_base);
pr_debug("flags.legacy_ficaa=%u", df_cfg.flags.legacy_ficaa);
pr_debug("flags.socket_id_shift_quirk=%u", df_cfg.flags.socket_id_shift_quirk);
}
@@ -282,6 +298,11 @@ int get_df_system_info(void)
get_num_maps();
+ if (get_dram_hole_base()) {
+ pr_warn("amd_atl: Failed to read DRAM hole base");
+ return -EINVAL;
+ }
+
dump_df_cfg();
return 0;
--
2.34.1
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