linux-kernel - Re: [PATCH] soc: qcom: cmd-db: map shared memory as WT, not WB

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Message-ID: <e0586d43-284c-4bef-a8be-4ffbc12bf787@linaro.org>
Date: Wed, 27 Mar 2024 21:45:03 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Volodymyr Babchuk <Volodymyr_Babchuk@...m.com>
Cc: Caleb Connolly <caleb.connolly@...aro.org>,
 Bjorn Andersson <andersson@...nel.org>,
 "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 Douglas Anderson <dianders@...omium.org>, Rob Clark <robdclark@...il.com>
Subject: Re: [PATCH] soc: qcom: cmd-db: map shared memory as WT, not WB

On 27.03.2024 9:09 PM, Volodymyr Babchuk wrote:
> It appears that hardware does not like cacheable accesses to this
> region. Trying to access this shared memory region as Normal Memory
> leads to secure interrupt which causes an endless loop somewhere in
> Trust Zone.
> 
> The only reason it is working right now is because Qualcomm Hypervisor
> maps the same region as Non-Cacheable memory in Stage 2 translation
> tables. The issue manifests if we want to use another hypervisor (like
> Xen or KVM), which does not know anything about those specific
> mappings. This patch fixes the issue by mapping the shared memory as
> Write-Through. This removes dependency on correct mappings in Stage 2
> tables.
> 
> I tested this on SA8155P with Xen.
> 
> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@...m.com>
> ---

Interesting..

+Doug, Rob have you ever seen this on Chrome? (FYI, Volodymyr, chromebooks
ship with no qcom hypervisor)