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Message-ID: <20240327121008.2827616-1-sashal@kernel.org>
Date: Wed, 27 Mar 2024 08:10:08 -0400
From: Sasha Levin <sashal@...nel.org>
To: stable@...r.kernel.org,
leyfoon.tan@...rfivetech.com
Cc: Samuel Holland <samuel.holland@...ive.com>,
Atish Patra <atishp@...osinc.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: FAILED: Patch "clocksource/drivers/timer-riscv: Clear timer interrupt on timer initialization" failed to apply to 6.6-stable tree
The patch below does not apply to the 6.6-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@...r.kernel.org>.
Thanks,
Sasha
------------------ original commit in Linus's tree ------------------
>From 8248ca30ef89f9cc74ace62ae1b9a22b5f16736c Mon Sep 17 00:00:00 2001
From: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
Date: Thu, 7 Mar 2024 01:23:30 +0800
Subject: [PATCH] clocksource/drivers/timer-riscv: Clear timer interrupt on
timer initialization
In the RISC-V specification, the stimecmp register doesn't have a default
value. To prevent the timer interrupt from being triggered during timer
initialization, clear the timer interrupt by writing stimecmp with a
maximum value.
Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available")
Cc: <stable@...r.kernel.org>
Signed-off-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
Reviewed-by: Samuel Holland <samuel.holland@...ive.com>
Tested-by: Samuel Holland <samuel.holland@...ive.com>
Reviewed-by: Atish Patra <atishp@...osinc.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Link: https://lore.kernel.org/r/20240306172330.255844-1-leyfoon.tan@starfivetech.com
---
drivers/clocksource/timer-riscv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index e66dcbd665665..79bb9a98baa7b 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -108,6 +108,9 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
{
struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);
+ /* Clear timer interrupt */
+ riscv_clock_event_stop();
+
ce->cpumask = cpumask_of(cpu);
ce->irq = riscv_clock_event_irq;
if (riscv_timer_cannot_wake_cpu)
--
2.43.0
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