[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240328-tps6598x_fix_event_handling-v1-0-865842a30009@wolfvision.net>
Date: Thu, 28 Mar 2024 17:25:20 +0100
From: Javier Carrasco <javier.carrasco@...fvision.net>
To: Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Abdel Alkuor <abdelalkuor@...tab.com>
Cc: linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, Javier Carrasco <javier.carrasco@...fvision.net>
Subject: [PATCH RESEND 0/2] usb: typec: tipd: fix event checking in
interrupt service routines
The ISRs of the tps25750 and tps6598x do not handle generated events
properly under all circumstances.
The tps6598x ISR does not read all bits of the INT_EVENTX registers,
leaving events signaled with bits above 64 unattended. Moreover, these
events are not cleared, leaving the interrupt enabled.
The tps25750 reads all bits of the INT_EVENT1 register, but the event
checking is not right because the same event is checked in two different
regions of the same register by means of an OR operation.
This series aims to fix both issues by reading all bits of the
INT_EVENTX registers, and limiting the event checking to the region
where the supported events are defined (currently they are limited to
the first 64 bits of the registers, as the are defined as BIT_ULL()).
If the need for events above the first 64 bits of the INT_EVENTX
registers arises, a different mechanism might be required. But for the
current needs, all definitions can be left as they are.
Note: resend to add 'stable' mailing list (fixes in the series).
Signed-off-by: Javier Carrasco <javier.carrasco@...fvision.net>
---
Javier Carrasco (2):
usb: typec: tipd: fix event checking for tps25750
usb: typec: tipd: fix event checking for tps6598x
drivers/usb/typec/tipd/core.c | 37 +++++++++++++++++++++----------------
1 file changed, 21 insertions(+), 16 deletions(-)
---
base-commit: 4cece764965020c22cff7665b18a012006359095
change-id: 20240328-tps6598x_fix_event_handling-8fff3a6018d9
Best regards,
--
Javier Carrasco <javier.carrasco@...fvision.net>
Powered by blists - more mailing lists