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Message-ID: <20240328205445.GA326382-robh@kernel.org>
Date: Thu, 28 Mar 2024 15:54:45 -0500
From: Rob Herring <robh@...nel.org>
To: Sibi Sankar <quic_sibis@...cinc.com>
Cc: sudeep.holla@....com, cristian.marussi@....com, andersson@...nel.org,
	konrad.dybcio@...aro.org, jassisinghbrar@...il.com,
	krzysztof.kozlowski+dt@...aro.org, linux-kernel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	quic_rgottimu@...cinc.com, quic_kshivnan@...cinc.com,
	conor+dt@...nel.org, quic_gkohli@...cinc.com,
	quic_nkela@...cinc.com, quic_psodagud@...cinc.com
Subject: Re: [PATCH 1/5] dt-bindings: mailbox: qcom: Add CPUCP mailbox
 controller bindings

On Thu, Mar 28, 2024 at 03:20:40PM +0530, Sibi Sankar wrote:
> Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox
> controller.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
> 
> rfc:

rfc is not a version, but a "state of the patch" tag. This should be v2.

> * Use x1e80100 as the fallback for future SoCs using the cpucp-mbox
>   controller. [Krzysztoff/Konrad/Rob]
> 
>  .../bindings/mailbox/qcom,cpucp-mbox.yaml     | 49 +++++++++++++++++++
>  1 file changed, 49 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml

Reviewed-by: Rob Herring <robh@...nel.org>

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