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Message-ID: <CACRpkdaxekb_E4ttW5XfRUa+srkjOzUaVXRAtHMYjkVir7R7xQ@mail.gmail.com>
Date: Thu, 28 Mar 2024 10:15:05 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Billy Tsai <billy_tsai@...eedtech.com>
Cc: andrew@...econstruct.com.au, joel@....id.au, johnny_huang@...eedtech.com,
linux-aspeed@...ts.ozlabs.org, openbmc@...ts.ozlabs.org,
linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, BMC-SW@...eedtech.com, Ricky_CX_Wu@...ynn.com,
Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
Subject: Re: [PATCH v2] pinctrl: pinctrl-aspeed-g6: Fix register offset for
pinconf of GPIOR-T
On Wed, Mar 13, 2024 at 10:28 AM Billy Tsai <billy_tsai@...eedtech.com> wrote:
> The register offset to disable the internal pull-down of GPIOR~T is 0x630
> instead of 0x620, as specified in the Ast2600 datasheet v15
> The datasheet can download from the official Aspeed website.
>
> Fixes: 15711ba6ff19 ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
> Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>
Patch applied.
I recorded Delphine's similar patch as "reported-by".
Yours,
Linus Walleij
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