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Message-Id: <1711725718-6362-2-git-send-email-quic_msarkar@quicinc.com>
Date: Fri, 29 Mar 2024 20:51:55 +0530
From: Mrinmay Sarkar <quic_msarkar@...cinc.com>
To: andersson@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, konrad.dybcio@...aro.org,
manivannan.sadhasivam@...aro.org
Cc: quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com,
quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com,
quic_krichai@...cinc.com, quic_vbadigan@...cinc.com,
quic_schintav@...cinc.com, Mrinmay Sarkar <quic_msarkar@...cinc.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v10 1/3] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
Add devicetree bindings support for SA8775P SoC. It has DMA register
space and dma interrupt to support HDMA.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../devicetree/bindings/pci/qcom,pcie-ep.yaml | 64 +++++++++++++++++++++-
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index a223ce0..46802f7 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
@@ -13,6 +13,7 @@ properties:
compatible:
oneOf:
- enum:
+ - qcom,sa8775p-pcie-ep
- qcom,sdx55-pcie-ep
- qcom,sm8450-pcie-ep
- items:
@@ -20,6 +21,7 @@ properties:
- const: qcom,sdx55-pcie-ep
reg:
+ minItems: 6
items:
- description: Qualcomm-specific PARF configuration registers
- description: DesignWare PCIe registers
@@ -27,8 +29,10 @@ properties:
- description: Address Translation Unit (ATU) registers
- description: Memory region used to map remote RC address space
- description: BAR memory region
+ - description: DMA register space
reg-names:
+ minItems: 6
items:
- const: parf
- const: dbi
@@ -36,13 +40,14 @@ properties:
- const: atu
- const: addr_space
- const: mmio
+ - const: dma
clocks:
- minItems: 7
+ minItems: 5
maxItems: 8
clock-names:
- minItems: 7
+ minItems: 5
maxItems: 8
qcom,perst-regs:
@@ -57,14 +62,18 @@ properties:
- description: Perst separation enable offset
interrupts:
+ minItems: 2
items:
- description: PCIe Global interrupt
- description: PCIe Doorbell interrupt
+ - description: DMA interrupt
interrupt-names:
+ minItems: 2
items:
- const: global
- const: doorbell
+ - const: dma
reset-gpios:
description: GPIO used as PERST# input signal
@@ -125,6 +134,10 @@ allOf:
- qcom,sdx55-pcie-ep
then:
properties:
+ reg:
+ maxItems: 6
+ reg-names:
+ maxItems: 6
clocks:
items:
- description: PCIe Auxiliary clock
@@ -143,6 +156,10 @@ allOf:
- const: slave_q2a
- const: sleep
- const: ref
+ interrupts:
+ maxItems: 2
+ interrupt-names:
+ maxItems: 2
- if:
properties:
@@ -152,6 +169,10 @@ allOf:
- qcom,sm8450-pcie-ep
then:
properties:
+ reg:
+ maxItems: 6
+ reg-names:
+ maxItems: 6
clocks:
items:
- description: PCIe Auxiliary clock
@@ -172,6 +193,45 @@ allOf:
- const: ref
- const: ddrss_sf_tbu
- const: aggre_noc_axi
+ interrupts:
+ maxItems: 2
+ interrupt-names:
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775p-pcie-ep
+ then:
+ properties:
+ reg:
+ minItems: 7
+ maxItems: 7
+ reg-names:
+ minItems: 7
+ maxItems: 7
+ clocks:
+ items:
+ - description: PCIe Auxiliary clock
+ - description: PCIe CFG AHB clock
+ - description: PCIe Master AXI clock
+ - description: PCIe Slave AXI clock
+ - description: PCIe Slave Q2A AXI clock
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg
+ - const: bus_master
+ - const: bus_slave
+ - const: slave_q2a
+ interrupts:
+ minItems: 3
+ maxItems: 3
+ interrupt-names:
+ minItems: 3
+ maxItems: 3
unevaluatedProperties: false
--
2.7.4
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