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Message-ID: <d8c0ca00-7e14-454e-8a65-5dcf14ed7796@linaro.org>
Date: Sat, 30 Mar 2024 20:19:44 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Ajit Pandey <quic_ajipan@...cinc.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>, Vinod Koul <vkoul@...nel.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, Taniya Das <quic_tdas@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
Imran Shaik <quic_imrashai@...cinc.com>,
Satya Priya Kakitapalli <quic_skakitap@...cinc.com>
Subject: Re: [PATCH 1/7] clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for
LUCID EVO PLL
On 30/03/2024 19:28, Ajit Pandey wrote:
> In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single
> PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL
> register using regmap_write() API in __alpha_pll_trion_set_rate
> callback will override LUCID EVO PLL initial configuration related
> to PLL_CAL_L_VAL bit fields in PLL_L_VAL register.
>
> Observed random PLL lock failures during PLL enable due to such
> override in PLL calibration value. Use regmap_update_bits() with
> L_VAL bitfield mask instead of regmap_write() API to update only
> PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback.
>
> Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces")
>
No blank lines between tags.
Add Cc-stable tag.
Please do not combine fixes with new features.
Best regards,
Krzysztof
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