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Message-ID: <d020d14a-6f57-4283-ab71-293f1d9a9cc9@linaro.org>
Date: Sun, 31 Mar 2024 10:17:42 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Ajit Pandey <quic_ajipan@...cinc.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konrad.dybcio@...aro.org>, Vinod Koul <vkoul@...nel.org>,
 Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 linux-kernel@...r.kernel.org, Taniya Das <quic_tdas@...cinc.com>,
 Jagadeesh Kona <quic_jkona@...cinc.com>,
 Imran Shaik <quic_imrashai@...cinc.com>,
 Satya Priya Kakitapalli <quic_skakitap@...cinc.com>
Subject: Re: [PATCH 2/7] dt-bindings: clock: qcom: Add DISPCC clocks for
 SM4450

On 30/03/2024 19:28, Ajit Pandey wrote:
> Add support for qcom display clock controller bindings
> for SM4450 platform.

You cannot add support for a binding. Either you add a binding or not.
Please look at git history for inspiration.

> 
> Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>


> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: Board active XO source
> +      - description: Display AHB clock source from GCC
> +      - description: sleep clock source
> +      - description: Byte clock from DSI PHY0
> +      - description: Pixel clock from DSI PHY0
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  '#power-domain-cells':
> +    const: 1

No power-domain? This looks incomplete.

Best regards,
Krzysztof


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