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Message-ID: <CAMuHMdW=Hbv8Qiyf=Ot_kHTbfPo0yk+NkutS80uC6cuAWYMsyg@mail.gmail.com>
Date: Tue, 2 Apr 2024 15:43:00 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Romain Gantois <romain.gantois@...tlin.com>
Cc: "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>, Russell King <linux@...linux.org.uk>,
Clément Léger <clement.leger@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH net-next 1/3] dt-bindings: net: renesas,rzn1-gmac:
Document RZ/N1 GMAC support
Hi Romain,
On Tue, Apr 2, 2024 at 2:36 PM Romain Gantois
<romain.gantois@...tlin.com> wrote:
> From: Clément Léger <clement.leger@...tlin.com>
>
> The RZ/N1 series of MPUs feature up to two Gigabit Ethernet controllers.
> These controllers are based on Synopsys IPs. They can be connected to
> RZ/N1 RGMII/RMII converters.
>
> Add a binding that describes these GMAC devices.
>
> Signed-off-by: "Clément Léger" <clement.leger@...tlin.com>
> [rgantois: commit log]
> Signed-off-by: Romain Gantois <romain.gantois@...tlin.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
> +examples:
> + - |
> + #include <dt-bindings/clock/r9a06g032-sysctrl.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + ethernet@...00000 {
> + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> + reg = <0x44000000 0x2000>;
> + interrupt-parent = <&gic>;
There is no need to use interrupt-parent in examples.
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> + clock-names = "stmmaceth";
> + clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
If you want this to be a real example, you should add power-domains.
> + snps,multicast-filter-bins = <256>;
> + snps,perfect-filter-entries = <128>;
> + tx-fifo-depth = <2048>;
> + rx-fifo-depth = <4096>;
> + pcs-handle = <&mii_conv1>;
> + phy-mode = "mii";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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