linux-kernel - Re: [PATCH v6 2/9] x86/cpu: KVM: Move macro to encode PAT value to common header

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Thu, 4 Apr 2024 10:03:18 +1300
From: "Huang, Kai" <kai.huang@...el.com>
To: Sean Christopherson <seanjc@...gle.com>, Thomas Gleixner
	<tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov
	<bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>, <x86@...nel.org>,
	Paolo Bonzini <pbonzini@...hat.com>, Andy Lutomirski <luto@...nel.org>,
	"Peter Zijlstra" <peterz@...radead.org>
CC: <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>, Shan Kang
	<shan.kang@...el.com>, Xin Li <xin3.li@...el.com>
Subject: Re: [PATCH v6 2/9] x86/cpu: KVM: Move macro to encode PAT value to
 common header


>   void __init pat_bp_init(void)
>   {
>   	struct cpuinfo_x86 *c = &boot_cpu_data;
> -#define PAT(p0, p1, p2, p3, p4, p5, p6, p7)				\
> -	((X86_MEMTYPE_ ## p0)      | (X86_MEMTYPE_ ## p1 << 8)  |	\
> -	(X86_MEMTYPE_ ## p2 << 16) | (X86_MEMTYPE_ ## p3 << 24) |	\
> -	(X86_MEMTYPE_ ## p4 << 32) | (X86_MEMTYPE_ ## p5 << 40) |	\
> -	(X86_MEMTYPE_ ## p6 << 48) | (X86_MEMTYPE_ ## p7 << 56))
> -
>   
>   	if (!IS_ENABLED(CONFIG_X86_PAT))
>   		pr_info_once("x86/PAT: PAT support disabled because CONFIG_X86_PAT is disabled in the kernel.\n");
> @@ -281,7 +275,7 @@ void __init pat_bp_init(void)
>   		 * NOTE: When WC or WP is used, it is redirected to UC- per
>   		 * the default setup in __cachemode2pte_tbl[].
>   		 */
> -		pat_msr_val = PAT(WB, WT, UC_MINUS, UC, WB, WT, UC_MINUS, UC);
> +		pat_msr_val = PAT_VALUE(WB, WT, UC_MINUS, UC, WB, WT, UC_MINUS, UC);
>   	}
>   
>   	/*
> @@ -321,7 +315,7 @@ void __init pat_bp_init(void)
>   		 * NOTE: When WT or WP is used, it is redirected to UC- per
>   		 * the default setup in __cachemode2pte_tbl[].
>   		 */
> -		pat_msr_val = PAT(WB, WC, UC_MINUS, UC, WB, WC, UC_MINUS, UC);
> +		pat_msr_val = PAT_VALUE(WB, WC, UC_MINUS, UC, WB, WC, UC_MINUS, UC);
>   	} else {
>   		/*
>   		 * Full PAT support.  We put WT in slot 7 to improve
> @@ -349,7 +343,7 @@ void __init pat_bp_init(void)
>   		 * The reserved slots are unused, but mapped to their
>   		 * corresponding types in the presence of PAT errata.
>   		 */
> -		pat_msr_val = PAT(WB, WC, UC_MINUS, UC, WB, WP, UC_MINUS, WT);
> +		pat_msr_val = PAT_VALUE(WB, WC, UC_MINUS, UC, WB, WP, UC_MINUS, WT);
>   	}
>   
>   	memory_caching_control |= CACHE_PAT;

I found there's one "#undef PAT" at the end of pat_bp_init() and it 
should be removed:

void __init pat_bp_init(void)
{
         struct cpuinfo_x86 *c = &boot_cpu_data;
#define PAT(p0, p1, p2, p3, p4, p5, p6, p7)                     \
         (((u64)PAT_ ## p0) | ((u64)PAT_ ## p1 << 8) |           \
         ((u64)PAT_ ## p2 << 16) | ((u64)PAT_ ## p3 << 24) |     \
         ((u64)PAT_ ## p4 << 32) | ((u64)PAT_ ## p5 << 40) |     \
         ((u64)PAT_ ## p6 << 48) | ((u64)PAT_ ## p7 << 56))

	...

         memory_caching_control |= CACHE_PAT;

         init_cache_modes(pat_msr_val);
#undef PAT
}