linux-kernel - RE: [PATCH v2 2/3] dt-bindings: phy: Add i.MX8Q HSIO SerDes PHY binding

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Date: Wed, 3 Apr 2024 05:16:41 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Conor Dooley <conor@...nel.org>, Frank Li <frank.li@....com>
CC: "vkoul@...nel.org" <vkoul@...nel.org>, "kishon@...nel.org"
	<kishon@...nel.org>, "robh+dt@...nel.org" <robh+dt@...nel.org>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "linux-phy@...ts.infradead.org"
	<linux-phy@...ts.infradead.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "kernel@...gutronix.de"
	<kernel@...gutronix.de>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>
Subject: RE: [PATCH v2 2/3] dt-bindings: phy: Add i.MX8Q HSIO SerDes PHY
 binding


> -----Original Message-----
> From: Conor Dooley <conor@...nel.org>
> Sent: 2024年4月3日 2:17
> To: Frank Li <frank.li@....com>
> Cc: Hongxing Zhu <hongxing.zhu@....com>; vkoul@...nel.org;
> kishon@...nel.org; robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org;
> conor+dt@...nel.org; linux-phy@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> kernel@...gutronix.de; imx@...ts.linux.dev
> Subject: Re: [PATCH v2 2/3] dt-bindings: phy: Add i.MX8Q HSIO SerDes PHY
> binding
> 
> On Tue, Apr 02, 2024 at 10:23:45AM -0400, Frank Li wrote:
> > On Tue, Apr 02, 2024 at 01:45:03PM +0800, Richard Zhu wrote:
> > > Add i.MX8QM and i.MX8QXP HSIO SerDes PHY binding.
> > > - Use the controller ID to specify which controller is binded to the
> > > PHY.
> > > - Introduce one HSIO configuration, mandatory required to set
> > > "PCIE_AB_SELECT" and "PHY_X1_EPCS_SEL" during the initialization.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> >
> > You missed all conor's comments.
> > Please double check v1's comments.
> 
Hi Frank:
Thanks a lot for your reminder.
It's my fault that I missed this email.

> > > +  fsl,refclk-pad-mode:
> > > +    description: |
> > > +      Specifies the mode of the refclk pad used. It can be UNUSED(PHY
> > > +      refclock is derived from SoC internal source), INPUT(PHY refclock
> > > +      is provided externally via the refclk pad) or OUTPUT(PHY refclock
> > > +      is derived from SoC internal source and provided on the refclk pad).
> > > +      Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants
> > > +      to be used.
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    enum: [ 0, 1, 2 ]
> >
> > I remember needn't enum because there are header file.
> 
> Yah, specifically my comments about this property were missed and were
> probably the most meaningful comments I left.
Hi Conor:
I'm so sorry about it.
I made the mistake missing your last review email.
Would follow your comments in next review cycle.

Best Regards
Richard Zhu
> 
> Thanks for the reminder Frank.