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Date: Thu, 4 Apr 2024 04:31:06 +0000
From: Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>
To: Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>,
"conor@...nel.org" <conor@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
Houlong Wei (魏厚龙) <houlong.wei@...iatek.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
CK Hu (胡俊光) <ck.hu@...iatek.com>,
"conor+dt@...nel.org" <conor+dt@...nel.org>, "robh@...nel.org"
<robh@...nel.org>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>, "jassisinghbrar@...il.com"
<jassisinghbrar@...il.com>, "angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>
Subject: Re: [PATCH v5 02/10] dt-bindings: mailbox: Add mboxes property for
CMDQ secure driver
Hi Conor,
Thanks for the reviews.
On Wed, 2024-04-03 at 16:46 +0100, Conor Dooley wrote:
> On Wed, Apr 03, 2024 at 06:25:54PM +0800, Shawn Sung wrote:
> > From: "Jason-JH.Lin" <jason-jh.lin@...iatek.com>
> >
> > Add mboxes to define a GCE loopping thread as a secure irq handler.
> > This property is only required if CMDQ secure driver is supported.
> >
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
> > ---
> > .../bindings/mailbox/mediatek,gce-mailbox.yaml | 10
> > ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/mailbox/mediatek,gce-
> > mailbox.yaml
> > b/Documentation/devicetree/bindings/mailbox/mediatek,gce-
> > mailbox.yaml
> > index cef9d76013985..c0d80cc770899 100644
> > --- a/Documentation/devicetree/bindings/mailbox/mediatek,gce-
> > mailbox.yaml
> > +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-
> > mailbox.yaml
> > @@ -49,6 +49,16 @@ properties:
> > items:
> > - const: gce
> >
> > + mediatek,gce-events:
> > + description:
> > + The event id which is mapping to the specific hardware event
> > signal
> > + to gce. The event id is defined in the gce header
> > + include/dt-bindings/gce/<chip>-gce.h of each chips.
>
> Missing any info here about when this should be used, hint - you have
> it
> in the commit message.
>
> > + $ref: /schemas/types.yaml#/definitions/uint32-arrayi
>
> Why is the ID used by the CMDQ service not fixed for each SoC?
>
I forgot to sync with Shawn about this:
https://lore.kernel.org/all/20240124011459.12204-1-jason-
jh.lin@...iatek.com
I'll fix it at the next version.
Regards,
Jason-JH.Lin
> Cheers,
> Conor
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