| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Thu, 4 Apr 2024 14:14:34 +0900 From: Yoshinori Sato <ysato@...rs.sourceforge.jp> To: linux-sh@...r.kernel.org Cc: Yoshinori Sato <ysato@...rs.sourceforge.jp>, Damien Le Moal <dlemoal@...nel.org>, Niklas Cassel <cassel@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Geert Uytterhoeven <geert+renesas@...der.be>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Thomas Gleixner <tglx@...utronix.de>, Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof Wilczyński <kw@...ux.com>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby <jirislaby@...nel.org>, Magnus Damm <magnus.damm@...il.com>, Daniel Lezcano <daniel.lezcano@...aro.org>, Rich Felker <dalias@...c.org>, John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>, Lee Jones <lee@...nel.org>, Helge Deller <deller@....de>, Heiko Stuebner <heiko.stuebner@...rry.de>, Shawn Guo <shawnguo@...nel.org>, Sebastian Reichel <sre@...nel.org>, Chris Morgan <macromorgan@...mail.com>, Linus Walleij <linus.walleij@...aro.org>, Arnd Bergmann <arnd@...db.de>, David Rientjes <rientjes@...gle.com>, Hyeonggon Yoo <42.hyeyoo@...il.com>, Vlastimil Babka <vbabka@...e.cz>, Baoquan He <bhe@...hat.com>, Andrew Morton <akpm@...ux-foundation.org>, Guenter Roeck <linux@...ck-us.net>, Kefeng Wang <wangkefeng.wang@...wei.com>, Stephen Rothwell <sfr@...b.auug.org.au>, Javier Martinez Canillas <javierm@...hat.com>, Guo Ren <guoren@...nel.org>, Azeem Shaikh <azeemshaikh38@...il.com>, Max Filippov <jcmvbkbc@...il.com>, Jonathan Corbet <corbet@....net>, Jacky Huang <ychuang3@...oton.com>, Herve Codina <herve.codina@...tlin.com>, Manikanta Guntupalli <manikanta.guntupalli@....com>, Anup Patel <apatel@...tanamicro.com>, Biju Das <biju.das.jz@...renesas.com>, Uwe Kleine-König <u.kleine-koenig@...gutronix.de>, Sam Ravnborg <sam@...nborg.org>, Sergey Shtylyov <s.shtylyov@....ru>, Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>, linux-ide@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, dri-devel@...ts.freedesktop.org, linux-pci@...r.kernel.org, linux-serial@...r.kernel.org, linux-fbdev@...r.kernel.org Subject: [RESEND v7 23/37] dt-bindings: display: sm501 register definition helper Miscellaneous Timing and Miscellaneous Control registers definition. Signed-off-by: Yoshinori Sato <ysato@...rs.sourceforge.jp> --- include/dt-bindings/display/sm501.h | 76 +++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 include/dt-bindings/display/sm501.h diff --git a/include/dt-bindings/display/sm501.h b/include/dt-bindings/display/sm501.h new file mode 100644 index 000000000000..a6c6943642e4 --- /dev/null +++ b/include/dt-bindings/display/sm501.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +#ifndef __DT_BINDING_DISPALY_SM501__ +#define __DT_BINDING_DISPALY_SM501__ + +/* Miscellaneous Conntrol */ +#define SM501_MISC_CONTROL_PAD_24 0 +#define SM501_MISC_CONTROL_PAD_12 1 +#define SM501_MISC_CONTROL_PAD_8 2 + +#define SM501_MISC_CONTROL_USBCLK_XTAL 0 +#define SM501_MISC_CONTROL_USBCLK_96MHZ 1 +#define SM501_MISC_CONTROL_USBCLK_48MHZ 2 + +#define SM501_MISC_CONTROL_RFSH_8US 0 +#define SM501_MISC_CONTROL_RFSH_16US 1 +#define SM501_MISC_CONTROL_RFSH_32US 2 +#define SM501_MISC_CONTROL_RFSH_64US 3 + +#define SM501_MISC_CONTROL_HOLD_EMPTY 0 +#define SM501_MISC_CONTROL_HOLD_8TR 1 +#define SM501_MISC_CONTROL_HOLD_16TR 2 +#define SM501_MISC_CONTROL_HOLD_24TR 3 +#define SM501_MISC_CONTROL_HOLD_32TR 4 + +/* Miscellaneous timing */ +#define SM501_MISC_TIMING_EX_HOLD_0 0 +#define SM501_MISC_TIMING_EX_HOLD_16 1 +#define SM501_MISC_TIMING_EX_HOLD_32 2 +#define SM501_MISC_TIMING_EX_HOLD_48 3 +#define SM501_MISC_TIMING_EX_HOLD_64 4 +#define SM501_MISC_TIMING_EX_HOLD_80 5 +#define SM501_MISC_TIMING_EX_HOLD_96 6 +#define SM501_MISC_TIMING_EX_HOLD_112 7 +#define SM501_MISC_TIMING_EX_HOLD_128 8 +#define SM501_MISC_TIMING_EX_HOLD_144 9 +#define SM501_MISC_TIMING_EX_HOLD_160 10 +#define SM501_MISC_TIMING_EX_HOLD_176 11 +#define SM501_MISC_TIMING_EX_HOLD_192 12 +#define SM501_MISC_TIMING_EX_HOLD_208 13 +#define SM501_MISC_TIMING_EX_HOLD_224 14 +#define SM501_MISC_TIMING_EX_HOLD_240 15 + +#define SM501_MISC_TIMING_XC_INTERNAL 0 +#define SM501_MISC_TIMING_XC_HCLK 1 +#define SM501_MISC_TIMING_XC_GPIO 2 + +#define SM501_MISC_TIMING_SM_DIV1 0 +#define SM501_MISC_TIMING_SM_DIV2 1 +#define SM501_MISC_TIMING_SM_DIV4 2 +#define SM501_MISC_TIMING_SM_DIV8 3 +#define SM501_MISC_TIMING_SM_DIV16 4 +#define SM501_MISC_TIMING_SM_DIV32 5 +#define SM501_MISC_TIMING_SM_DIV64 6 +#define SM501_MISC_TIMING_SM_DIV128 7 +#define SM501_MISC_TIMING_SM_DIV3 8 +#define SM501_MISC_TIMING_SM_DIV6 9 +#define SM501_MISC_TIMING_SM_DIV12 10 +#define SM501_MISC_TIMING_SM_DIV24 11 +#define SM501_MISC_TIMING_SM_DIV48 12 +#define SM501_MISC_TIMING_SM_DIV96 13 +#define SM501_MISC_TIMING_SM_DIV192 14 +#define SM501_MISC_TIMING_SM_DIV384 15 + +#define SM501_MISC_TIMING_DIV336MHZ 0 +#define SM501_MISC_TIMING_DIV288MHZ 1 +#define SM501_MISC_TIMING_DIV240MHZ 2 +#define SM501_MISC_TIMING_DIV192MHZ 3 + +#define SM501_MISC_TIMING_DELAY_NONE 0 +#define SM501_MISC_TIMING_DELAY_0_5 1 +#define SM501_MISC_TIMING_DELAY_1_0 2 +#define SM501_MISC_TIMING_DELAY_1_5 3 +#define SM501_MISC_TIMING_DELAY_2_0 4 +#define SM501_MISC_TIMING_DELAY_2_5 5 + +#endif -- 2.39.2
Powered by blists - more mailing lists