lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <89927174-6ca9-4299-8157-a0404b30b156@gmail.com>
Date: Fri, 5 Apr 2024 10:28:59 +0800
From: Robert Hoo <robert.hoo.linux@...il.com>
To: Jacob Pan <jacob.jun.pan@...ux.intel.com>,
 LKML <linux-kernel@...r.kernel.org>, X86 Kernel <x86@...nel.org>,
 Peter Zijlstra <peterz@...radead.org>, iommu@...ts.linux.dev,
 Thomas Gleixner <tglx@...utronix.de>, Lu Baolu <baolu.lu@...ux.intel.com>,
 kvm@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
 Joerg Roedel <joro@...tes.org>, "H. Peter Anvin" <hpa@...or.com>,
 Borislav Petkov <bp@...en8.de>, Ingo Molnar <mingo@...hat.com>
Cc: Paul Luse <paul.e.luse@...el.com>, Dan Williams
 <dan.j.williams@...el.com>, Jens Axboe <axboe@...nel.dk>,
 Raj Ashok <ashok.raj@...el.com>, "Tian, Kevin" <kevin.tian@...el.com>,
 maz@...nel.org, seanjc@...gle.com, Robin Murphy <robin.murphy@....com>
Subject: Re: [PATCH 04/15] x86/irq: Add a Kconfig option for posted MSI

On 1/27/2024 7:42 AM, Jacob Pan wrote:
> This option will be used to support delivering MSIs as posted
> interrupts. Interrupt remapping is required.
> 
> Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> ---
>   arch/x86/Kconfig | 11 +++++++++++
>   1 file changed, 11 insertions(+)
> 
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 5edec175b9bf..79f04ee2b91c 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -463,6 +463,17 @@ config X86_X2APIC
>   
>   	  If you don't know what to do here, say N.
>   
> +config X86_POSTED_MSI
> +	bool "Enable MSI and MSI-x delivery by posted interrupts"
> +	depends on X86_X2APIC && X86_64 && IRQ_REMAP

Does posted_msi really depend on x2APIC? PID.NDST encoding supports both xAPIC 
and x2APIC.
If posted_msi posts more stringent requirement, I think it deserves an 
explanation in this patch's description.

And, X86_X2APIC already depends on IRQ_REMAP, can we just list one of them here?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ